Display Data; Block Diagram - Yamaha TSX-10 Service Manual

Q Q
3 7 6 3 1 5 1 5 0

DISPLAY DATA

V201 : 13-BT-191GN (V7357700)
~
1
PIN CONNECTION
Pin No. 70 69 68 67 66 65 64 63 62 61 60
Connection F1 F1 NP P26 P27 P28 P29 P30 P31 P32 P33
Pin No. 1 2 3 4 5 6 7 8 9 10 11
Connection F1 F1 NP P25 P24 P23 P22 P21 P20 P19 P18
Note : 1) F1, F2 ..... Filament 2) NP ..... No pin
4) Pin No. 37 and 51 are connected internally
GRID ASSIGNMENT
12G 11G 10G 9G 8G
T E
L 1 3 9 4 2 2 9 6 5 1 3
1-1 2-1 3-1 4-1 5-1
1-2 2-2 3-2 4-2 5-2
1-3 2-3 3-3 4-3 5-3
1-4 2-4 3-4 4-4 5-4
1-5 2-5 3-5 4-5 5-5
1-6 2-6 3-6 4-6 5-6
1-7 2-7 3-7 4-7 5-7
(15G~1G)
ANODE CONNECTION
13G 12G~1G
P1 1-1
P2 kHz 2-1
MHz
P3 3-1
P4 B.BOOST 4-1
P5 TONE 5-1
P6 RANDOM 1-2
P7 PROG 2-2
TPTAL
P8 3-2
P9 F 4-2
w w w
P10 S 5-2
P11 REP 1-3
P12 PTY HOLD 2-3
P13 CT 3-3
.
RT
P14 4-3
P15 PTY 5-3
P16 TUNED 1-4
P17 PS 2-4
P18 RDS 3-4
Z
PATTERN AREA
Y
59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
P34 P35 NC IC NX NX NX NX 13G 12G 11G 10G 9G 8G 7G 6G 5G 4G 3G 2G
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
P17 P16 P15 P14 P13 NX NX NX NX P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2
3) IC ..... Internal connection (IC pin should be electrically open on the PC board)
5) NX ..... No extend pin 6) DL ..... Datum Line 7) 1G ~ 16G ..... Grid
7G 6G 5G 4G 3G 2G 1G
13G 12G~1G
P19 MEMORY
P20 AUTO
SLEEP
P21
P22 STEREO
P23 TIMER
P24 PRESET
P25 –
P26 –
P27 –
P28 –
P29 –
x a o
y
P30 –
P31 –
i
P32 –
P33 –
P34 –
P35 –
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BLOCK DIAGRAM

39 38 37 36
1G NP F2 F2
32 33 34 35
P1 NP F2 F2
13G
Q Q
3 7 6 3
4-4
5-4
1-5
2-5
3-5
4-5
5-5
1-6
2-6
3-6
4-6
u 1 6 3
5-6
1-7
.
2-7
3-7
4-7
5-7
24
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2 4
9 9 8
1 5 1 5 0 8 9 2 4
m
c o
TSX-10/15/20
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9 9
9 8 2 9 9
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