Philips for Intel Socket 775 processor Service Manual

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User manual (52 pages)

Summary of Contents for Philips for Intel Socket 775 processor

Page 1: Table Of Contents
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Published by MW Service PaCE...
Page 2: Technical Specifications
EN 2 S/SD/HD 3.1 PDP Technical Specifications 1. Technical Specifications Model / Chassis overview 42" SDv3 External View PDP Type Model Name H x V Pixel Chassis M3 = X Board + Y Board + Logic Board + PSU + SUB PSU 37”SDv4 S37SD-YD02 (*) 852 x 480...
Page 3 Technical Specifications S/SD/HD 3.1 PDP EN 3 42"HDv3 Points of Screw Mount External View M3 = X Board + Y Board + Logic Board + PSU + SUB PSU Serial number label Voltage label Panel model label Figure 1-7 50" HDv3 External View M3 = X Board + Y Board + Logic Board + PSU + SUB PSU Serial Number...
Page 4 EN 4 S/SD/HD 3.1 PDP Technical Specifications Serial Number 2 6 1 4 0 8 07 0 8 6 5 Serial No : 0001~9999 Date : 01~31 Month : 01~12 Year : 00(2000) ~99(2099) Line No : 1 ~ 9 (0:Pilot Line) Type : 02~48 (ex.50HDv3:26) (Step of even)
Page 5 Technical Specifications S/SD/HD 3.1 PDP EN 5 Item Specification 42” HDV3 Specification 50” HDV3 Horizontal 1.024 xVertical 768 pixels(1 pixel = 1 R,G,B Horizontal 1366 x Vertical 768 pixels(1 pixel = 1 R,G,B Pixel cells) cells) Number of Cells 3072 (H) x 768 (V) Horizontal 4,098 x Vertical 768 cells Pixel Pitch Horizontal 912mm x Vertical 693mm...
Page 6: Safety Instructions, Warnings And Notes
EN 6 S/SD/HD 3.1 PDP Safety Instructions, Warnings and Notes 2. Safety Instructions, Warnings and Notes ** To prevent the risks of unit damage, electrical shock and radiation, take the following safety, service, and ESD precautions. Safety instructions  • PDP module has a lot of electric devices.
Page 7 Safety Instructions, Warnings and Notes S/SD/HD 3.1 PDP EN 7 • After removing ESD assembly, put on it with aluminum stuff • Routing of the wires and fixing them in position must be on the conductive surface to prevent charging. done in accordance with the original routing and fixing •...
Page 8: Directions For Use
EN 8 S/SD/HD 3.1 PDP Directions For Use Directions For Use Not applicable...
Page 9: Mechanical Instruction
Mechanical Instruction S/SD/HD 3.1 PDP EN 9 4. Mechanical Instruction Disassembling / Re-asssembling 4.1.1 Disassembling & Re-assembling of FPC (Flexible Printed Circuit) and Y-Buffer (Upper and Lower) 1. Removal procedure • Pull out the FPC from Connector by holding the lead of the FPC with both hands.
Page 10 EN 10 S/SD/HD 3.1 PDP Mechanical Instruction 2. Assembling Procedures • Put the Flat cable into the connector press down lightly until locking sound (“Click.“) comes out. 4.1.3 Assembling & Disassembling the FFC and TCP form Connector 1. Disassembling of TCP •...
Page 11 Mechanical Instruction S/SD/HD 3.1 PDP EN 11 3. Misassembling of TCP • The misassembling of TCP is the cause of defect. 4. Assembling & Disassembling of FFC The procedure of assembling and disassembling of FFC is same as TCP • This is the photo of the assembling of FFC.
Page 12 EN 12 S/SD/HD 3.1 PDP Mechanical Instruction Photo 2 - 42" SDv2 Photo 2 - 42" SDv3...
Page 13 Mechanical Instruction S/SD/HD 3.1 PDP EN 13 Photo 2 - 42" HDv3 Photo 2 - S37" SDv4...
Page 14 EN 14 S/SD/HD 3.1 PDP Mechanical Instruction Photo 2 - 50" HDv3 1. 42" SDv3 - Remove the screws in order of 2-3-5-7-1-4-6 and 10-11-13-16-9-12-14 for HD from heat sink and then get rid of heat sink. (Photo 1) 42" HDv3, S37" SDv4, 50" HDv3 - Remove the screws in order of Center - Left Side - Right Side from heat sink and then get rid of heat sink.
Page 15 Mechanical Instruction S/SD/HD 3.1 PDP EN 15 8. Reassemble the YBU and YBL to the Y-Main. 11. Connect the FPC and YM of panel to the connector. 9. Connect the connector of CN5006 and CN5007 among 12. Supply the electric power to the module and then check the YBU, YBL and YM.
Page 16: Diagnostic Software
EN 16 S/SD/HD 3.1 PDP Diagnostic software 5. Diagnostic software Repair tools 1.) 3122 785 90581 = Foam buffers 2.) Compair connector: 3122 785 90800 3.) V2 jig 3122 785 90760 4.) V3 jig 3122 785 90770 Figure 5-1 Foam buffers for PDP 3122 785 90760 Figure 5-2 3122 785 90760 Figure 5-3 3122 785 90770...
Page 17 Use LVDS Tool when possible Go to Power Supply Check Output of SSB / SCAVIO & repair scenario is OK? With Philips application or PDP as stand alone check SDI repair Scenario Fault finding; Display fault Repair Philips application Scavio = FM242 SSB EMG = FTP1.1...
Page 18 Replace PSU On/Off relay RLY8001/8002 acts? Switch on via 1 or 2 Switch from standby to on; 1 Via RC when Philips application is in. Check Protection Red 2 Via Switch on Jig connector when Philips LED8004 application is removed Green LED´s...
Page 19 RLY8001/8002 acts? Switch on via 1 or 2 Check Protection Red LED8004 Switch from standby to on; 1 Via RC when Philips application is in. Green LED´s 2 Via Switch on Jig connector when Philips 8001, 8002 application is removed...
Page 20 EN 20 S/SD/HD 3.1 PDP Diagnostic software Repair Scenario SDI PDP panels as stand alone V2 versions Repair 42SDV2 Check PDP Type number PDP identification = S42SD-YD06 S42SD-YD05 Go to V3 or V4 repair scenario For FM242 disconnect and remove SCAVIO Board For FTP1.1 disconnect and remove SSB and Audio Board 3122 785 90760 Connect Jig connector to CN8002 (13 pins)
Page 21 Diagnostic software S/SD/HD 3.1 PDP EN 21 Repair Scenario SDI PDP panels as stand alone V3 & V4 versions Repair 42" & 50" SDV3 as Stand alone Check PDP type number PDP identification = S37SD-YD02 or YB01? Other PDP S42SD-YD05 or YB03? type S42AX-XD02 or XB01? S50HW-XD03 or XB02?
Page 22 EN 22 S/SD/HD 3.1 PDP Diagnostic software Fault Symptoms First check complete set. Fault Symptom? Some horizontal or Vertical No Voltage output Operating Voltages exist, Abnormal Display, not Lines don´t exist on the Operating Voltages don´t exist but No Display open or short Lines Display.
Page 23 Diagnostic software S/SD/HD 3.1 PDP EN 23 No Display Operating voltages exist, but there No Display is no Display. Scavio or SSB is No Display is related with Y-Main, disconnected and removed. X-Main or Logic-main board Power supply will be started- up with Jig connector and DIp swithc on Logic main is Bring set in...
Page 24: Abnormal Display
EN 24 S/SD/HD 3.1 PDP Diagnostic software Abnormal Display Abnormal Display Exept horizontal or Vertical Lines Check FFC Flat Foil Connections between Logic-main, X-main and Y- main Logic-Main Observation of abnormal Display Y-Main Check Check Fuses and FET X-Main Check Check Fuses and FET Regular abnormal pattern...
Page 25 Diagnostic software S/SD/HD 3.1 PDP EN 25 Some horizontal lines don´t exist on the Display. Sustain open or short Sustain Open or Sustain Short Horizontal Lines Horizontal lines Some horizontal lines don´t Some horizontal lines appear exist on Display to be linked on Video Y-FPC Y-FPC Sustain open...
Page 26 EN 26 S/SD/HD 3.1 PDP Diagnostic software Some Vertical Lines don´t exists or are always on, Adress Open or Adress Short. A part of the Display is not addressed Adress Open Adress Short Adress open is related with Adress short is related with Logic Main, Logic Buffer Logic Main, Logic Buffer, , FFC, TCP and so on.
Page 27: Block Diagrams
Block Diagrams, Testpoint Overview, and Waveforms S/SD/HD 3.1 PDP EN 27 6. Block Diagrams, Testpoint Overview, and Waveforms Block Diagram for Logic circuit 42" SDv2 LOGIC CONTROL LVDS Display DRIVER CIRCUIT & PANEL DATA_R Data 8Bits DATA_G 8Bits DATA_B 852× 480 Pixels Driver 8Bits 852×...
Page 28 EN 28 S/SD/HD 3.1 PDP Block Diagrams, Testpoint Overview, and Waveforms 42" HDv3 LOGIC CONTROL Display DRIVER CIRCUIT & PANEL DATA_R Data Column Driver 8Bits DATA_G 8Bits DATA_B Driver 8Bits 1024× 768 Pixels Timing DCLK 1024× 3× 768 Cells Vsync Scan Hsync Timing...
Page 29 Block Diagrams, Testpoint Overview, and Waveforms S/SD/HD 3.1 PDP EN 29 50" HDv3 LOGIC CONTROL Display DRIVER CIRCUIT & PANEL DATA_R Data 8(9)Bits Column Driver DATA_G 8(9)Bits DATA_B Driver 8(9)Bits 1366× 768 Pixels Timing DCLK 1366× 3× 768 Cells Vsync Scan Hsync Timing...
Page 30 EN 30 S/SD/HD 3.1 PDP Block Diagrams, Testpoint Overview, and Waveforms 42" SDv3 CN8002 T-VS COLD CN8003 T-VPFC CN8009 VR8008 VSET DOW N T-0V T-VCC-S VSCAN VR8004 T-VE D5VL T-VSCAN T-VCC HIC8001 CN8005 PFC sub B/D HIC8003 VS sub B/D CN8006 HIC8002 T-VSET...
Page 31 Block Diagrams, Testpoint Overview, and Waveforms S/SD/HD 3.1 PDP EN 31 Output Voltage Setting Output Voltage (Nominal Load λ) voltage(V) Variable Point 370V ~ 400V 160V ~ 185V 65V ~ 80V 150V ~ 170V VSET 160V ~ 180V Check voltage label on the PDP VSCAN -55V ~ -75V for correct values.
Page 32 EN 32 S/SD/HD 3.1 PDP Block Diagrams, Testpoint Overview, and Waveforms 50" HDv3 DONGAH ELECOMM DESIGN CHECK APPROVE PCB NAME P5-503-PHINZI VER. NO. 00M5510408191 SHEET 1 OF 6 HOT (LIVE) COMP.SILK SCREEN -P 1/6 - P5-503-PHINZ1 .PCB FILE NAME COLD (ISOLATED) UL6500:E240806.UL60950:E166582 00MS5510408191 IV - 1...
Page 33: Circuit Diagrams And Pwb Layouts
Circuit Diagrams and PWB Layouts S/SD/HD 3.1 PDP EN 33 7. Circuit Diagrams and PWB Layouts Not aplicable.
Page 34: Alignments
EN 34 S/SD/HD 3.1 PDP Aligments 8. Aligments Adjustment Specification, Checking Position etc. 8.1.1 42" SDv2 1) Preparation Insert Short Bar (J8002) in SMPS Connect Relay Jig S/W JIG Change Logic B’d S/W into internal mode Internal Mode external Mode Insert Jig AC socket Oscilloscope CH1: V-SYNC (CN201)
Page 35 Aligments S/SD/HD 3.1 PDP EN 35 How to adjust waveform Procedure 1) Make Full White on Screen. 2) Observe waveform using Oscilloscope. check OUT4 TP in Y-buffer(upper). Observe the waveform of the third waveform of 1TV-Field. Adjust the division of oscilloscope like the left picture Adjust the period of Vset as 10µS, that of -Vsc(1) as 20µs,...
Page 36 EN 36 S/SD/HD 3.1 PDP Aligments Rising Ramp Falling Ramp 50V/div. 20V/div. DC=0V 50µs/div. 20µs/div. VR5004 1. VR5004 Adjustment: Vsch TP => 40volt 2. VR5002 Adjustment: Rising Ramp flat time: Typ. 10 µsec TP:Vsch 3. VR5003 Adjustment: Falling Ramp flat time => Typ. 30 µsec 4.
Page 37 Aligments S/SD/HD 3.1 PDP EN 37 8.1.3 42" HDv3 V3.1 TCP Ramp Waveform Inclination Adjustment (Y-Board) rising maintance time falling maintance time Adjust VR5002 to set the time of Adjust VR5004 to set the voltage of Yrr (Rising Ramp) 20 Vsch (Scan high voltage) 40 V Adjust VR5003 to set the time of Adjust VR5001 to set the time of...
Page 38 EN 38 S/SD/HD 3.1 PDP Aligments VR5004 1. VR5004 / Adjustment; Clock-wise to max 2. VR5005/ Adiustment; Clock-wise to max 3. VR5001/ Adiustment; Clock-wise to 4 division 4. VR5002 Adjustment: Rising Ramp flat time: => Typ. 20usec VR5003 5. VR5006 Adjustment: Falling Ramp flat time =>...
Page 39 Aligments S/SD/HD 3.1 PDP EN 39 8.1.4 S37" SDv4 V3.1 TCP Ramp Waveform Inclination Adjustment (Y-Board) 40 µs 16 µs Adjust VR5001 to set the time of Yrr( Rising Ramp) 40 µs Adjust VR5000 to set the time of 38 V Adjust VR5002 to set the time of Yfr (Falling Ramp_1st) 16 µs Rising Ramp...
Page 40 EN 40 S/SD/HD 3.1 PDP Aligments VR5004 1. VR5004 / Adjustment; Clock-wise to max 2. VR5005/ Adiustment; Clock-wise to max 3. VR5001/ Adiustment; Clock-wise to 4 division 4. VR5002 Adjustment: Rising Ramp flat time: => Typ. 20usec VR5003 5. VR5006 Adjustment: Falling Ramp flat time =>...
Page 41 Aligments S/SD/HD 3.1 PDP EN 41 8.1.5 50" HDv3 V3.1 TCP Ramp Waveform Inclination Adjustment (Y-Board) Adjust VR5000 to set the time of Adjust VR5901 to set the voltage of Yrr( Rising Ramp) 50 µs Vsch [Scan high voltage ] 25V Adjust VR5002 to set the time of Adjust VR5001 to set the time of Yfr Yfr (Falling Ramp_3rd) 20 µs...
Page 42 EN 42 S/SD/HD 3.1 PDP Aligments 1. VR5901(Vscan_h) / Adjustment; 25V 2. VR5901/(Vscan) / Adjustment; -90V 3. VR5901/ Adiustment; Fix 4. VR5000 Adjustment: Rising Ramp flat time: => Typ. 50 µsec 5. VR5001 Adjustment : Falling Ramp flat time => Typ. 35 µsec VR5000 VR5001 6.
Page 43 Aligments S/SD/HD 3.1 PDP EN 43 Adjusting procedure • Change the waveform voltage GND to 38V by adjusting the VR5000. 42" SDv3 (SDv2) Special Notice: When you adjust the inclination of waveform, 1. Get Pattern to be Full White. do check and adjustment being based on the Reset waveform 2.
Page 44: Circuit Descriptions
EN 44 S/SD/HD 3.1 PDP Circuit Descriptions 9. Circuit Descriptions Main function of Each Assembly Abbrevitation 9.1.1 X-main board Tape Carrier Package The X-main board generate a drive signal by switching the FET Flat Foil Cable (connection) in synchronization with logic Circuit on Foil main board timing and supplies the X electrode of the panel Flexible Printed Circuit...
Page 45: Spare Parts List
Spare Parts List S/SD/HD 3.1 PDP EN 45 10. Spare Parts List 42"SDv2 50"HDv3 PDP type PDP type S42SD-YD06 9322 195 45682 PDP model name (non spare) S50HW-XD03 9322 215 26682 PDP model name S42SD-YB04 9965 000 17797 PDP without PSU (non spare) S50HW-XB02 9966 000 26017 PDP without PSU...
Page 46 EN 46 S/SD/HD 3.1 PDP Spare Parts List...

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Lc 4.7, fm 242 (ftv 2.1), ftp 1.1, ftp 2.2 x S37sd-yd02 S37sd-yb02 S42sd-yd06 S42sd-yb04 S42sd-yd05 ... Show all

Philips for Intel Socket 775 processor Service Manual

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