Interface
5.6.3 Transfer of Ultra DMA data
Figures 5.12 to 5.21 define the timings concerning every phase for the Ultra DMA
Burst.
Table 5.18 includes the timing for each Ultra DMA mode.
5.6.3.1 Starting of Ultra DMA data In Burst
The timing for each Ultra DMA mode is included in 5.6.3.2.
DMARQ
(device)
DMACK-
(host)
STOP
(host)
HDMARDY-
(host)
DSTROBE
(device)
DD (15:0)
DA0,DA1,DA2,
CS0-,CS1-
Note :
Figure 5.12 Starting of Ultra DMA data In Burst transfer
5-110
t
UI
t
t
ACK
ENV
t
t
ACK
ENV
t
ZIORDY
t
AZ
t
ACK
The definitions of STOP, HDMARDY- and DSTROBE signals are
valid before the assertion of DMACK signal.
t
FS
t
ZAD
t
FS
t
ZAD
t
VDS
C141-E104-03EN
t
DVH