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The memory cycle time is 6.94 microseconds for a read-restore cycle, a clear-write cycle,
or a read-compute-write cycle.
During a read-restore cycle, 18 bits of information are read from the memory and transferred
to the data communications processor.
During a clear-write cycle, 18 bits of information are transferred from the data communications
processor and written into memory.
During a read-compute-write cycle, 18 bits of information are read from memory, changed
by the data communications processor, and then the new information is written back into memory.
THE BUFFER SELECTOR
All units connected directly to the buffer selector are referred to as "buffers." Information
flows via the buffers and the buffer selector to and from the data communications processor.
The buffer selector contains 128 channels numbered 0 to 127. Each buffer occupies one channel
address of the buffer selector, whether the channel is simplex, half-duplex, or full-duplex.
The buffer selector channel address for each buffer is established by the wiring of an address
plug.
The address can be changed or new addresses (buffers) added by changing the existing
plug wiring or inserting a new address plug. The channel addresses in any given buffer module
need not be sequential.
However the addresses for bit buffers must be sequential. Channel 0
is always reserved for the paper tape reader.
THE BIT BUFFER UNIT MODULE
General
The bit buffer units contain a control section and up to ten bit buffer channels.
The bit buffer unit control section contains hardware that is common to all the bit buffer channels
in the module.
A bit buffer module may terminate from 1 to 10 full-duplex or half-duplex trans-
mission lines which are all operating at the same bit rate.
Bit Buffer Channel
The function of a bit buffer channel is to transmit data to and receive data from a remote
terminal on a bit basis.
Each bit buffer channel in a module is assigned a buffer selector address by the address plug
for that module. The address applies to both the receive and the transmit section. The addresses
for the bit buffers in a module can be whatever is desired for the system and they need not
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