Asus AAEON BOXER-6843-ADS User Manual
Asus AAEON BOXER-6843-ADS User Manual

Asus AAEON BOXER-6843-ADS User Manual

Fanless embedded controller
Table of Contents

Advertisement

Quick Links

BOXER-6843-ADS
Fanless Embedded Controller
st
User's Manual 1
Ed
Last Updated: December 18, 2023

Advertisement

Table of Contents
loading

Summary of Contents for Asus AAEON BOXER-6843-ADS

  • Page 1 BOXER-6843-ADS Fanless Embedded Controller User’s Manual 1 Last Updated: December 18, 2023...
  • Page 2 Copyright Notice This document is copyrighted, 2023. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other product name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel® and Celeron® are registered trademarks of Intel Corporation ⚫ Core™ is a trademark of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6843-ADS ⚫ Wallmount Kit ⚫ Screw Pack ⚫ DC Terminal Block ⚫ Remote Power On/Off Cable ⚫ Graphic Cable ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON System QO4-381 Rev.A0 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯 醚(PBDE) (Pb) (Hg) (Cd) (Cr(VI)) (PBB) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材 ○ ○...
  • Page 10 China RoHS Requirement (EN) Hazardous and Toxic Materials List AAEON System QO4-381 Rev.A0 Hazardous or Toxic Materials or Elements Component Name PCB and Components Wires & Connectors for Ext.Connections Chassis CPU & RAM HDD Drive LCD Module Optical Drive Touch Control Module Battery This form is prepared in compliance with the provisions of SJ/T 11364.
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ......................6 Jumpers and Connectors ..................9 List of Jumpers ....................... 10 2.3.1 Clear CMOS Jumper (JP1) ..............10 2.3.2 AT/ATX Mode Selection (JP3) ..............
  • Page 12 2.4.16 Dual COM Connector RS-232/422/485 (CN22) ......34 2.4.17 USB 2.0 Wafer Box (CN24/CN25/CN26/CN27) ......35 2.4.18 Audio Wafer (CN29) ................35 2.4.19 DC-In Connector (CN30) ..............36 2.4.20 M.2 2280 M-Key 1 (CN31) ..............36 2.4.21 PEG [x16] Slot (CN36) ................38 2.4.22 Mini PCIe Socket (CN37) ..............
  • Page 13 Setup Submenu: Advanced ................68 3.4.1 CPU Configuration ................69 3.4.2 Memory Configuration ................ 70 3.4.3 PCH-FW Configuration ................. 71 3.4.3.1 Firmware Update Configuration ..........72 3.4.4 Hardware Monitor ................73 3.4.4.1 Smart Fan Mode Configuration ........... 74 3.4.5 Power Management ................78 3.4.6 AAEON BIOS Robot ................
  • Page 14 3.6.2 Secure Boot ................... 112 3.6.2.1 Key Management ..............113 Setup Submenu: Boot ..................115 3.7.1 UEFI Hard Disk Drive BBS Priorities ..........116 Setup Submenu: Save & Exit ................117 Setup Submenu: MEBx ..................118 Chapter 4 – Drivers Installation ..................119 Drivers Download and Installation..............
  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 16: Specifications

    Specifications System Generation Intel® Core™/Celeron® Processor G Series, LGA-1700 Socket Type, TDP Max. 65W (LGA 6+0, LGA 8+8) 13th Generation Intel® Core™ Processors: Intel® Core™ i9-13900TE/i9-13900E Intel® Core™ i7-13700E Intel® Core™ i5-13500E Intel® Core™ i3-13100TE 12th Generation Intel® Core™/Celeron® Processor G Series Processors: Intel®...
  • Page 17 System HDMI x 2, Display Port x 2 RJ-45 x 4 USB 3.2 Gen 2 (Type-A) x 8 DB-9 Male x 6 for RS-232/422/485 (Autoflow, Programmable) DB-15 Male x 1 for 8-bit DIO Audio (Mic-in/Line-out) DC 19V ~ 36V 3-pin Terminal Block Connector Power Button with LED x 1 Remote Power On/Off x 1 Reset Button x 1...
  • Page 18 Mechanical Mounting Wallmount Dimensions (W x H x D) 7.35’’ x 8.92’’ x 14.76’’ (186.8mm x 226.5mm x 375mm) without brackets 7.35’’ x 9.19’’ x 16.50’’ (186.8mm x 233.5mm x 419mm) with brackets Gross Weight Net Weight Environmental Operating Temperature -4°F ~ 113°F (-20°C ~ 45°C) with 0.5 m/s airflow –...
  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 20: Dimensions

    Dimensions System Dimensions Chapter 2 – Hardware Information...
  • Page 21 Chapter 2 – Hardware Information...
  • Page 22 Main Board Dimensions Chapter 2 – Hardware Information...
  • Page 23: Jumpers And Connectors

    Jumpers and Connectors Chapter 2 – Hardware Information...
  • Page 24: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application. Label Function Clear CMOS Jumper AT/ATX Mode Selection PEG Lanes CFG2 Selection PCI Express x16 Lane Selection PEG Lanes CFG2 Selection 2.3.1 Clear CMOS Jumper (JP1) 1 2 3...
  • Page 25: Peg Lanes Cfg2/Pci Express X16 Lane Selection (Jp4)

    2.3.3 PEG Lanes CFG2/PCI Express x16 Lane Selection (JP4) 0 = Lane reverse 1 = Lane normal Lane normal Lane reverse (default) 2.3.4 PEG Lanes CFG2 Selection (JP5) CFG [6:5]: PCI Express Bifurcation 10 = 2 x8 PCI Express 11 = 1 x16 PCI Express 1 2 3 1 2 3 Chapter 2 –...
  • Page 26: List Of Connectors

    List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function PCIe [x4] Slot Dual DP Port LAN + USB 3.2 x 2 Connector LAN + USB 3.2 x 2 Connector LAN + USB 3.2 x 2 Connector LAN + USB 3.2 x 2 Connector M.2 3052 B-Key...
  • Page 27 Label Function CN31 M.2 2280 M-Key 1 CN36 PEG [x16] Slot CN37 Mini PCIe Socket CN50 2X4 PEG Power CN51 2X4 PEG Power CN52 COM Port 1 Wafer Box CN53 COM Port 2 Wafer Box CN54 COM Port 3 Wafer Box CN55 COM Port 4 Wafer Box CN56...
  • Page 28: Pcie [X4] Slot (Cn1)

    2.4.1 PCIe [x4] Slot (CN1) Pin Name Signal Type Signal Level PRSNT1# +12V +12V +12V +12V PCIE_TXN5 DIFF PCIE_TXP5 DIFF PCIE_RXN5 DIFF PCIE_RXP5 DIFF +3.3V +3.3V +3.3V +3.3V PERST# PCIE_x4SLOT_CLK DIFF PCIE_x4SLOT_CLK# DIFF PCIE_RXP24 DIFF PCIE_RXN24 DIFF PCIE_RXP23 DIFF Chapter 2 – Hardware Information...
  • Page 29 Pin Name Signal Type Signal Level PCIE_RXN23 DIFF PCIE_RXP22 DIFF PCIE_RXN22 DIFF PCIE_RXP21 DIFF PCIE_RXN21 DIFF +12V +12V +12V +12V +12V +12V SMB_CLK SMB_CLK +V3.3S +3.3V 3.3Vaux +3.3V WAKE# PCIE_TXP24 DIFF PCIE_TXN24 DIFF PRSNT Chapter 2 – Hardware Information...
  • Page 30 Pin Name Signal Type Signal Level PCIE_TXP23 DIFF PCIE_TXN23 DIFF PCIE_TXP22 DIFF PCIE_TXN22 DIFF PCIE_TXP21 DIFF PCIE_TXN21 DIFF PRSNT Chapter 2 – Hardware Information...
  • Page 31: Dual Dp Port (Cn4)

    2.4.2 Dual DP Port (CN4) Pin Name Signal Type Signal Level DP1_DATA0 _P DIFF DP1_DATA0_N DIFF DP1_DATA1 _P DIFF DP1_DATA1 _N DIFF DP1_DATA2 _P DIFF DP1_DATA1 _N DIFF DP1_DATA3 _P DIFF DP1_DATA3 _N DIFF CONFIG1 CONFIG2 DP1_AUX _P DIFF DP1_AUX _N DIFF DP1_HPD RETURN...
  • Page 32 Pin Name Signal Type Signal Level DP1_PWR +3.3V DP2_DATA0 _P DIFF DP2_DATA0_N DIFF DP2_DATA1 _P DIFF DP2_DATA1 _N DIFF DP2_DATA2 _P DIFF DP2_DATA1 _N DIFF DP2_DATA3 _P DIFF DP2_DATA3 _N DIFF CONFIG1 CONFIG2 DP2_AUX _P DIFF DP2_AUX _N DIFF DP2_HPD RETURN DP2_PWR +3.3V...
  • Page 33: Lan + Usb 3.2 X 2 Connector (Cn5)

    2.4.3 LAN + USB 3.2 x 2 Connector (CN5) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI1- DIFF MDI2+ DIFF MDI2- DIFF MDI3+ DIFF MDI3- DIFF Pin Name Signal Type Signal Level +5VSB USB1_D- DIFF USB1_D+ DIFF Chapter 2 –...
  • Page 34 Pin Name Signal Type Signal Level USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF +5VSB USB2_D- DIFF USB2_D+ DIFF USB2_SSRX− DIFF USB2_SSRX+ DIFF USB2_SSTX− DIFF USB2_SSTX+ DIFF Chapter 2 – Hardware Information...
  • Page 35: Lan + Usb 3.2 X 2 Connector (Cn6)

    2.4.4 LAN + USB 3.2 x 2 Connector (CN6) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI1- DIFF MDI2+ DIFF MDI2- DIFF MDI3+ DIFF MDI3- DIFF Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF USB3_SSRX−...
  • Page 36: Lan + Usb 3.2 X 2 Connector (Cn7)

    Pin Name Signal Type Signal Level USB3_SSRX+ DIFF USB3_SSTX− DIFF USB3_SSTX+ DIFF +5VSB USB4_D- DIFF USB4_D+ DIFF USB4_SSRX− DIFF USB4_SSRX+ DIFF USB4_SSTX− DIFF USB4_SSTX+ DIFF 2.4.5 LAN + USB 3.2 x 2 Connector (CN7) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0-...
  • Page 37 Pin Name Signal Type Signal Level MDI3+ DIFF MDI3- DIFF Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF USB3_SSRX− DIFF USB3_SSRX+ DIFF USB3_SSTX− DIFF USB3_SSTX+ DIFF +5VSB USB4_D- DIFF USB4_D+ DIFF USB4_SSRX− DIFF USB4_SSRX+ DIFF USB4_SSTX− DIFF USB4_SSTX+ DIFF Chapter 2 –...
  • Page 38: Lan + Usb 3.2 X 2 Connector (Cn8)

    2.4.6 LAN + USB 3.2 x 2 Connector (CN8) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI1- DIFF MDI2+ DIFF MDI2- DIFF MDI3+ DIFF MDI3- DIFF Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF USB3_SSRX−...
  • Page 39: 3052 B-Key (Cn9)

    Pin Name Signal Type Signal Level USB3_SSRX+ DIFF USB3_SSTX− DIFF USB3_SSTX+ DIFF +5VSB USB4_D- DIFF USB4_D+ DIFF USB4_SSRX− DIFF USB4_SSRX+ DIFF USB4_SSTX− DIFF USB4_SSTX+ DIFF 2.4.7 M.2 3052 B-Key (CN9) Signal Signal Signal Pin Name Pin Name Type Type Level +3.3V +3.3V +3.3V...
  • Page 40 Signal Signal Signal Pin Name Pin Name Type Type Level USB_2.0_N DIFF USB3_RXN DIFF UIM_RST USB3_RXP DIFF UIM_CLK UIM_DATA USB3_TXN DIFF UIM_PWR USB3_TXP DIFF PCIE_RXN DIFF PCIE_RXP DIFF PCIE_TXN DIFF PCIE_TXP DIFF RESET# +3.3V CLKREQ# +3.3V PCIE_M.2_CLK# DIFF WAKE# +3.3V PCIE_M.2_CLK DIFF Chapter 2 –...
  • Page 41: B-Key Nano Sim Card (Cn10)

    Signal Signal Signal Pin Name Pin Name Type Type Level RESET# SUSCLK +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V 2.4.8 M.2 B-Key Nano SIM Card (CN10) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA Chapter 2 – Hardware Information...
  • Page 42: 2230 E-Key (Cn11)

    2.4.9 M.2 2230 E-Key (CN11) Signal Signal Signal Pin Name Pin Name Type Type Level +3.3V +3.3V USB+ DIFF +3.3V +3.3V USB- DIFF PCIE_TXP DIFF PCIE_TXN DIFF Chapter 2 – Hardware Information...
  • Page 43 Signal Signal Signal Pin Name Pin Name Type Type Level PCIE_RXP DIFF PCIE_RXN DIFF PCIE_M.2_CLK DIFF PCIE_M.2_CLK# DIFF SUSCLK RESET# PCIE_M2E_CLKR BT_EN WAKE# WIFI_EN SMB_DATA SMB_CLK +3.3V +3.3V +3.3V +3.3V Chapter 2 – Hardware Information...
  • Page 44: Remote Button Connector (Cn13)

    2.4.10 Remote Button Connector (CN13) Pin Name Signal Type Signal Level PWR_BUTTON 2.4.11 SPI Flash Port (CN14) Pin Name Signal Type Signal Level +3.3M_SPI SPI_CS SPI_CLK +3.3V SPI_MISO SPI_MOSI Chapter 2 – Hardware Information...
  • Page 45: Espi Port (Debug Card Connector) (Cn15)

    2.4.12 eSPI Port (Debug Card Connector) (CN15) Pin Name Signal Type Signal Level ESPI_IO_0 +1.8V ESPI_IO_1 +1.8V ESPI_IO_2 +1.8V ESPI_IO_3 +1.8V +3.3V +3.3V ESPI_IO_CS# ESPI_IO_RST# EPSI_IO_LCLK +3.3V +3.3V SMDAT SMCLK Chapter 2 – Hardware Information...
  • Page 46: Sata Port (Cn16/Cn17/Cn56/Cn58)

    2.4.13 SATA Port (CN16/CN17/CN56/CN58) Pin Name Signal Type Signal Level SATA_TX+ SATA_TX+ SATA_TX- SATA_TX- SATA_RX- SATA_RX- SATA_RX+ SATA_RX+ 2.4.14 SATA Power (CN18/CN19/CN57/CN59) +12V Pin Name Signal Type Signal Level +12V +12V Chapter 2 – Hardware Information...
  • Page 47: Dio Connector (Cn20)

    2.4.15 DIO Connector (CN20) Pin Name Signal Type Signal Level DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 Chapter 2 – Hardware Information...
  • Page 48: Dual Com Connector Rs-232/422/485 (Cn22)

    2.4.16 Dual COM Connector RS-232/422/485 (CN22) Pin Name Signal Type RS-422 RS-485 DCD1 RS422_TX- RS485_D- RS422_TX+ RS485_D+ RS422_RX+ DTR1 RS422_RX- DSR1 RTS1 CTS1 DCD2 RS422_TX- RS485_D- RS422_TX+ RS485_D- RS422_RX+ DTR2 RS422_RX- DSR2 RTS2 CTS2 Chapter 2 – Hardware Information...
  • Page 49: Usb 2.0 Wafer Box (Cn24/Cn25/Cn26/Cn27)

    2.4.17 USB 2.0 Wafer Box (CN24/CN25/CN26/CN27) Pin Name Signal Type Signal Level USBD- DIFF USBD+ DIFF 2.4.18 Audio Wafer (CN29) Pin Name Signal Type Signal Level MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO Chapter 2 – Hardware Information...
  • Page 50: Dc-In Connector (Cn30)

    Pin Name Signal Type Signal Level RIGHT_OUT +5V_AUDIO 2.4.19 DC-In Connector (CN30) Pin Name Signal Type Signal Level +19-36V +19-36V 2.4.20 M.2 2280 M-Key 1 (CN31) Signal Signal Signal Pin Name Pin Name Type Type Level +3.3V +3.3V +3.3V +3.3V PCIE_RXN3 DIFF Chapter 2 –...
  • Page 51 Signal Signal Signal Pin Name Pin Name Type Type Level PCIE_RXP3 DIFF PCIE_TXN3 DIFF +3.3V +3.3V PCIE_TXP3 DIFF +3.3V +3.3V +3.3V +3.3V PCIE_RXN2 DIFF +3.3V +3.3V PCIE_RXP2 DIFF PCIE_TXN2 DIFF PCIE_TXP2 DIFF PCIE_RXN1 DIFF PCIE_RXP1 DIFF PCIE_TXN1 DIFF PCIE_TXP1 DIFF DEVSLP SMB_CLK_M2 PCIE_RXP0...
  • Page 52: Peg [X16] Slot (Cn36)

    Signal Signal Signal Pin Name Pin Name Type Type Level +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V 2.4.21 PEG [x16] Slot (CN36) Signal Signal Signal Pin Name Pin Name Type Type Level +12V +12V +12V +12V +12V +12V +12V +12V JTAG2 SMB_CLK JTAG3 SMB_DATA...
  • Page 53 Signal Signal Signal Pin Name Pin Name Type Type Level PCIE_x16SLOT_C DIFF PEG_TXP0 DIFF PEG_TXN0 DIFF PEG_RXP0 DIFF PEG_RXN0 DIFF +3.3V +3.3V PEG_TXP1 DIFF PEG_TXN1 DIFF PEG_RXP1 DIFF PEG_RXN1 DIFF PEG_TXP2 DIFF PEG_TXN2 DIFF PEG_RXP2 DIFF PEG_RXN2 DIFF PEG_TXP3 DIFF PEG_TXN3 DIFF PEG_RXP3...
  • Page 54 Signal Signal Signal Pin Name Pin Name Type Type Level PEG_TXN6 DIFF PEG_RXP6 DIFF PEG_RXN6 DIFF PEG_TXP7 DIFF PEG_TXN7 DIFF PEG_RXP7 DIFF PEG_RXN7 DIFF +3.3V +3.3V PEG_TXP8 DIFF PEG_TXN8 DIFF PEG_RXP8 DIFF PEG_RXN8 DIFF PEG_TXP9 DIFF PEG_TXN9 DIFF PEG_RXP9 DIFF PEG_RXN9 DIFF PEG_TXP10...
  • Page 55: Mini Pcie Socket (Cn37)

    Signal Signal Signal Pin Name Pin Name Type Type Level PEG_TXP13 DIFF PEG_TXN13 DIFF PEG_RXP13 DIFF PEG_RXN13 DIFF PEG_TXP14 DIFF PEG_TXN14 DIFF PEG_RXP14 DIFF PEG_RXN14 DIFF PEG_TXP15 DIFF PEG_TXN15 DIFF PEG_RXP15 DIFF PEG_RXN15 DIFF +3.3V +3.3V 2.4.22 Mini PCIe Socket (CN37) Pin Name Signal Type Signal Level...
  • Page 56 Pin Name Signal Type Signal Level +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V Chapter 2 – Hardware Information...
  • Page 57 Pin Name Signal Type Signal Level PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 58: 2X4 Peg Power (Cn50/Cn51/Cn68)

    2.4.23 2X4 PEG Power (CN50/CN51/CN68) Pin Name Signal Type Signal Level +V12_GPU +12V +V12_GPU +12V +V12_GPU +12V Chapter 2 – Hardware Information...
  • Page 59: Com Port 1 Wafer Box (Optional) (Cn52)

    2.4.24 COM Port 1 Wafer Box (Optional) (CN52) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 60: Com Port 2 Wafer Box (Optional) (Cn53)

    2.4.25 COM Port 2 Wafer Box (Optional) (CN53) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 61: Com Port 3 Wafer Box (Optional) (Cn54)

    2.4.26 COM Port 3 Wafer Box (Optional) (CN54) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 62: Com Port 4 Wafer Box (Optional) (Cn55)

    2.4.27 COM Port 4 Wafer Box (Optional) (CN55) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 63: System Fan Connector (Cn60/Cn65)

    2.4.28 System Fan Connector (CN60/CN65) Pin Name Signal Type Signal Level +V12S +12V FAN_PWM FAN_CTL Chapter 2 – Hardware Information...
  • Page 64: Com Port 5 Wafer Box (Optional) (Cn61)

    2.4.29 COM Port 5 Wafer Box (Optional) (CN61) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 65: Com Port 6 Wafer Box (Optional) (Cn62)

    2.4.30 COM Port 6 Wafer Box (Optional) (CN62) Pin Name Signal Type RS-422 RS-485 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- Chapter 2 – Hardware Information...
  • Page 66: 2280 M-Key 2 (Cn63)

    2.4.31 M.2 2280 M-Key 2 (CN63) Signal Signal Signal Pin Name Pin Name Type Type Level +3.3V +3.3V +3.3V +3.3V PCIE_RXN3 DIFF PCIE_RXP3 DIFF PCIE_TXN3 DIFF +3.3V +3.3V PCIE_TXP3 DIFF +3.3V +3.3V +3.3V +3.3V PCIE_RXN2 DIFF +3.3V +3.3V PCIE_RXP2 DIFF PCIE_TXN2 DIFF PCIE_TXP2...
  • Page 67 Signal Signal Signal Pin Name Pin Name Type Type Level SMB_CLK_M2 +1.8V PCIE_RXP0 DIFF SMB_DATA_M2 +1.8V PCIE_RXN0 DIFF PCIE_TXN0 DIFF PCIE_TXP0 DIFF RESET# +3.3V CLKREQ# +3.3V PCIE_M.2_CLK# WAKE# +3.3V PCIE_M.2_CLK +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V Chapter 2 – Hardware Information...
  • Page 68: Dual Hdmi (Cn64)

    2.4.32 Dual HDMI (CN64) Pin Name Signal Type Signal Level HDMI1_DATA2_P DIFF HDMI1_DATA2_N DIFF HDMI1_DATA1_P DIFF HDMI1_DATA1_N DIFF HDMI1_DATA0_P DIFF HDMI1_DATA0_n DIFF HDMI1_CLK_P DIFF HDMI1_CLK_N DIFF 3.3V HDMI1_SCL HDMI1_SDA +V5S_HDMI_CON Chapter 2 – Hardware Information...
  • Page 69 Pin Name Signal Type Signal Level HDMI1_HPD_CONN HDMI2_DATA2_P DIFF HDMI2_DATA2_N DIFF HDMI2_DATA1_P DIFF HDMI2_DATA1_N DIFF HDMI2_DATA0_P DIFF HDMI2_DATA0_n DIFF HDMI2_CLK_P DIFF HDMI2_CLK_N DIFF 3.3V HDMI2_SCL HDMI2_SDA +V5S_HDMI_CON HDMI2_HPD_CONN Chapter 2 – Hardware Information...
  • Page 70: Mini Pcie Nano Sim Card (Cn67)

    2.4.33 Mini PCIe Nano SIM Card (CN67) Pin Name Signal Type Signal Level UIM_PWR NANO_UIM_RESET NANO_UIM_CLK NANO_UIM_VPP NANO_UIM_DATA Chapter 2 – Hardware Information...
  • Page 71: Cpu Fan Connector (Cn69)

    2.4.34 CPU Fan Connector (CN69) Pin Name Signal Type Signal Level +V12S +12V FAN_PWM FAN_CTL 2.4.35 Battery Connector (BAT1) Pin Name Signal Type Signal Level +3.3V_RTC 3.3V Chapter 2 – Hardware Information...
  • Page 72: Cpu Installation

    CPU Installation Step 1: Remove the chassis cover by unscrewing the six (6) retention screws. Step 2: You will see the CPU socket as in the diagram below. Install the CPU. Ensure you have also placed the thermal pad as shown below. Step 3: Replace the cover and secure with the six (6) screws removed in Step 1.
  • Page 73: Sata Installation

    SATA Installation Step 1: Unscrew the two (2) retractable screws from the SATA drive. Step 2: Remove the four (4) screws from the 2.5” SATA drive bay, insert your SATA module, then reaffix the screws to secure the drive to the drive bay. Step 3: Reinsert the drive bay and secure the loosened retractable screws.
  • Page 74: Expansion Module And Mini Card Location

    Expansion Module and Mini Card Location Note the location of the system’s M.2 and Mini Card expansion slots. Follow standard installation M.2 module and Mini Card installation procedures. For more information regarding slot placement, please refer to section 2.2. Chapter 2 – Hardware Information...
  • Page 75: Ram Module Installation

    RAM Module Installation Before you begin, make sure you have the RAM module(s) you wish to install, along with thermal pads for each. Step 1: Remove the four (4) screws on the chassis side panel. Step 2: Remove the seven (7) screws on the chassis cover. Chapter 2 –...
  • Page 76 Step 3: The BOXER-6843-ADS contains four (4) U-DIMM slots, as shown below. It is important to note that in order to install the RAM modules required, slots must be populated in specific configurations depending on the slots being populated. Please see below for the appropriate module pairings.
  • Page 77 DIMM1 and DIMM2 • If installing four RAM modules, populate all four DIMM slots. Installing RAM modules in a configuration contrary to that shown above may result in lower performance. Step 4: Insert the required RAM module(s) into the appropriate slot(s) at approximately a 45°...
  • Page 78: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 79: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.
  • Page 80: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 81: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 82: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 83: Cpu Configuration

    3.4.1 CPU Configuration Options Summary Intel (VMX)Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Hyper-Threading Technology. Intel®...
  • Page 84: Memory Configuration

    Options Summary C states Disabled Enabled Optimal Default, Failsafe Default Enable/Disable CPU Power Management. Allows CPU to go to C states when it’s not 100% utilized. 3.4.2 Memory Configuration Chapter 3 – AMI BIOS Setup...
  • Page 85: Pch-Fw Configuration

    3.4.3 PCH-FW Configuration Options Summary AMT BIOS Features Enabled Optimal Default, Failsafe Default Disabled When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx Setup. Note: This option does not disable Manageability Features in FW. Chapter 3 –...
  • Page 86: 3.4.3.1 Firmware Update Configuration

    3.4.3.1 Firmware Update Configuration Options Summary Me FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enabled/ Disable Me FW Image Re-Flash function. FW Update Enabled Disabled Optimal Default, Failsafe Default Enabled/ Disable Me FW Update function. Chapter 3 – AMI BIOS Setup...
  • Page 87: Hardware Monitor

    3.4.4 Hardware Monitor Options Summary Smart Fan Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Smart Fan. Chapter 3 – AMI BIOS Setup...
  • Page 88: Smart Fan Mode Configuration

    3.4.4.1 Smart Fan Mode Configuration Options Summary CPU FAN Output Mode Output PWM mode Optimal Default, Failsafe Default (open drain) Linear Fan Application Output PWM mode (push pull) Output PWM mode (push pull) to control 4-wire fans. Linear fan application circuit to control 3-wire fan speed by fan’s power terminal.
  • Page 89 Options Summary Temperature 1 Optimal Default, Failsafe Default Temperature 2 Optimal Default, Failsafe Default Temperature 3 Optimal Default, Failsafe Default Temperature 4 Optimal Default, Failsafe Default Duty Cycle 1 Optimal Default, Failsafe Default Duty Cycle 2 Optimal Default, Failsafe Default Duty Cycle 3 Optimal Default, Failsafe Default Duty Cycle 4...
  • Page 90 Options Summary System FAN 2 Output Mode Output PWM mode Optimal Default, Failsafe Default (open drain) Linear Fan Application Output PWM mode (push pull) Output PWM mode (push pull) to control 4-wire fans. Linear fan application circuit to control 3-wire fan speed by fan’s power terminal. Output PWM mode (open drain) to control Intel 4-wire fans.
  • Page 91 Options Summary Temperature 4 Optimal Default, Failsafe Default Duty Cycle 1 Optimal Default, Failsafe Default Duty Cycle 2 Optimal Default, Failsafe Default Duty Cycle 3 Optimal Default, Failsafe Default Duty Cycle 4 Optimal Default, Failsafe Default Duty Cycle 5 Optimal Default, Failsafe Default Auto fan speed control.
  • Page 92: Power Management

    3.4.5 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off Set GPI[3:0] Output as Hi or Low. System Wake On RTC Disabled Optimal Default, Failsafe Default...
  • Page 93: Aaeon Bios Robot

    3.4.6 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST Enabled Enabled – Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on completion of POST. WDT on completion of POST. WDT.
  • Page 94 Options Summary Delayed POST (PEI phase) Disabled Optimal Default, Failsafe Default Enabled Enabled -Robot holds BIOS from starting POST, right after power on. This allows BIOS POST to start with stable power or start after system is physically warmed-up. Note: Robot does this before 'Sends watch dog'. Delayed POST (DXE phase) Disabled Optimal Default, Failsafe Default...
  • Page 95: 3.4.6.1 Device Detecting Configuration

    3.4.6.1 Device Detecting Configuration Options Summary Action Reset System Optimal Default, Failsafe Default Hold System Select action that robot should do. Soft or hard reset Soft Optimal Default, Failsafe Default Hard Select reset type robot should send on each boot. Retry-Count Optimal Default, Failsafe Default Fill retry counter here.
  • Page 96 3.4.6.1.1 Device #1 Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 97 3.4.6.1.2 Device #2 Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 98 3.4.6.1.3 Device #3 Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 99 3.4.6.1.4 Device #4 Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 100 3.4.6.1.5 Device #5 Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 101: Setup Submenu: System I/O

    Setup Submenu: System I/O Chapter 3 – AMI BIOS Setup...
  • Page 102: Pci Express Configuration

    3.5.1 PCI Express Configuration Options Summary M.2 (B-Key) 3052 PCIe Auto Optimal Default, Failsafe Default Speed Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. M.2 (E-Key) 2230 PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. Mini-Card PCIe Speed Auto Optimal Default, Failsafe Default...
  • Page 103 Options Summary Configure PCIe Speed M.2 (M-Key) 2280 (CN63) Auto Optimal Default, Failsafe Default PCIe Speed Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. M.2 (M-Key) 2280 (CN31) Auto Optimal Default, Failsafe Default PCIe Speed Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. Chapter 3 –...
  • Page 104: Storage Configuration

    3.5.2 Storage Configuration Options Summary Enable VMD controller Disabled Optimal Default, Failsafe Default Enabled Enable/Disable to VMD controller. SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable/Disable to SATA Device. Port 1 Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. Port 2 Enabled Optimal Default, Failsafe Default...
  • Page 105 Options Summary Port 4 Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. Chapter 3 – AMI BIOS Setup...
  • Page 106: 3.5.2.1 Nvme Configuration

    3.5.2.1 NVMe Configuration Chapter 3 – AMI BIOS Setup...
  • Page 107: Hd Audio Configuration

    3.5.3 HD Audio Configuration Options Summary HD Audio Disabled Enabled Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disabled = HDA will be unconditionally disabled. Enabled = HDA will be unconditionally enabled. Chapter 3 – AMI BIOS Setup...
  • Page 108: Digital Io Port Configuration

    3.5.4 Digital IO Port Configuration Options Summary DIO1 Input Output Optimal Default, Failsafe Default Set DIO as Input or Output. Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output. DIO2 Input Output Optimal Default, Failsafe Default Set DIO as Input or Output.
  • Page 109 Options Summary Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output. DIO4 Input Output Optimal Default, Failsafe Default Set DIO as Input or Output. Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output. DIO5 Input Optimal Default, Failsafe Default...
  • Page 110: Legacy Logical Devices Configuration

    3.5.5 Legacy Logical Devices Configuration Chapter 3 – AMI BIOS Setup...
  • Page 111: Serial Port 1

    3.5.5.1 Serial Port 1 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8; IRQ=4; IO=2F8; IRQ=3; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 112: Serial Port 2

    3.5.5.2 Serial Port 2 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 113: Serial Port 3

    3.5.5.3 Serial Port 3 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8; IRQ=11; IO=2E8; IRQ=11; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 114: Serial Port 4

    3.5.5.4 Serial Port 4 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2E8; IRQ=11; IO=3E8; IRQ=11; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 115: Serial Port 5

    3.5.5.5 Serial Port 5 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2D0; IRQ=11; IO=2C0; IRQ=11; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 116: Serial Port 6

    3.5.5.6 Serial Port 6 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2C0; IRQ=11; IO=2D0; IRQ=11; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 117: 3.5.6 Serial Port Console Redirection

    3.5.6 Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Console Redirection EMS Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...
  • Page 118: Console Redirection Settings (Com0)

    3.5.6.1 Console Redirection Settings (COM0) Options Summary Terminal Type VT100 VT100Plus VT-UTF8 ANSI Optimal Default, Failsafe Default Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100Plus: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. Bits per second 9600 19200...
  • Page 119 Options Summary Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds. Data Bits Optimal Default, Failsafe Default Data Bits. Parity None Optimal Default, Failsafe Default Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors.
  • Page 120 Options Summary Putty KeyPad VT100 Optimal Default, Failsafe Default LINUX XTERMR6 ESCN VT400 Select FunctionKey and KeyPad on Putty. Chapter 3 – AMI BIOS Setup...
  • Page 121: Console Redirection Settings (Out-Of-Band Mgmt)

    3.5.6.2 Console Redirection Settings (Out-of-Band Mgmt) Options Summary Out-of-Band Mgmt Port COM0 Optimal Default, Failsafe Default COM1(Pci Bus0, Dev0, Func0) (Disabled) Microsoft Windows Emergency Management Services (EMS) allows for remote management of a Windows Server OS through a serial port. Terminal Type EMS VT100 VT100Plus...
  • Page 122 Options Summary Bits per second EMS 115200 Optimal Default, Failsafe Default Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds. Flow Control EMS None Optimal Default, Failsafe Default Hardware RTS/CTS Software Xon/Xoff Flow control can prevent data loss from buffer overflow.
  • Page 123: Setup Submenu: Security

    Setup Submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).
  • Page 124: Trusted Computing

    3.6.1 Trusted Computing Options Summary Security Device Support Enable Optimal Default, Failsafe Default Disable Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA256 PCR Bank Disabled Enabled Optimal Default, Failsafe Default...
  • Page 125 Options Summary Platform Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Platform Hierarchy. Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy. Endorsement Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy. Physical Presence Spec Version Optimal Default, Failsafe Default...
  • Page 126: Secure Boot

    3.6.2 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Secure Boot Mode Standard Custom...
  • Page 127: Key Management

    3.6.2.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Install factory default Secure Boot keys after the platform reset and while the System is in Setup mode. Restore Factory Keys Force System to User Mode. Install factory default Secure Boot key databases. Enroll Efi Image Allow Efi image to run in Secure Boot mode.
  • Page 128 Options Summary Forbidden Signatures (dbx) Update Append Authorized TimeStamps Update (dbt) Append OsRecovery Signatures (dbr) Update Append Enroll Factory Defaults or load certificates from a file: 1. Public Key Certificate: a) EFI_SIGNATURE_LIST b) EFI_CERT_X509 (DER) c) EFI_CERT_RSA2048 (bin) d) EFI_CERT_SHAXXX 2.
  • Page 129: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Default Enables/disables Quiet Boot option. Network Stack Disabled Default Enabled Enable/Disable UEFI Network Stack. Boot Option #1 Hard Disk Boot Option #2 NVME Boot Option #3 USB Device Boot Option #4 Network Sets the system boot order.
  • Page 130: Uefi Hard Disk Drive Bbs Priorities

    3.7.1 UEFI Hard Disk Drive BBS Priorities Options Summary Quiet Boot Disabled Enabled Default Enables/disables Quiet Boot option. Network Stack Disabled Default Enabled Enable/Disable UEFI Network Stack. Boot Option #1 Hard Disk Boot Option #2 NVME Boot Option #3 USB Device Boot Option #4 Network Sets the system boot order.
  • Page 131: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 132: Setup Submenu: Mebx

    Setup Submenu: MEBx Chapter 3 – AMI BIOS Setup...
  • Page 133: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 134: Drivers Download And Installation

    Drivers Download and Installation Drivers for the BOXER-6843-ADS can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/ Download the driver(s) you need and follow the steps below to install them. Install Chipset Driver Open the Chipset folder Run the SetupChipset.exe file in the folder Follow the instructions...
  • Page 135 Install Realtek Audio Driver Open the Realtek Audio Driver (ADSP-10.29.00.8467) folder Run the Setup.exe file in the folder Follow the instructions Driver will be installed automatically Install ME & TXE Drivers Open the ME & TXE folder Run the SetupME.exe file in the folder Follow the instructions Drivers will be installed automatically Install Intel®...
  • Page 136: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...
  • Page 137: I/O Address Map

    I/O Address Map Appendix C – Digital I/O Information...
  • Page 138: A.2 Irq Mapping Chart

    A.2 IRQ Mapping Chart Appendix C – Digital I/O Information...
  • Page 139 Appendix C – Digital I/O Information...
  • Page 140 Appendix C – Digital I/O Information...
  • Page 141 Appendix C – Digital I/O Information...
  • Page 142 Appendix C – Digital I/O Information...
  • Page 143 Appendix C – Digital I/O Information...
  • Page 144 Appendix C – Digital I/O Information...
  • Page 145 Appendix C – Digital I/O Information...
  • Page 146 Appendix C – Digital I/O Information...
  • Page 147 Appendix C – Digital I/O Information...
  • Page 148: A.3 Memory Address Map

    A.3 Memory Address Map Appendix C – Digital I/O Information...
  • Page 149: A.4 Large Memory Address Map

    A.4 Large Memory Address Map Appendix C – Digital I/O Information...

Table of Contents