T6950; Tc4069Ubp - Sony HB-501P Service Manual

* *
A00*1 10
AB3-AB7
AB14.I5
19~26
D0O~ DB7 -m -
9
-/
4
* 1 34-39
CONT BUS
£
IQRQ'MI,
6
CLK IN
CLOCK
BUFFER
29
CLK OUT
4
V1
MREQ, RO,
8
7^
4
4
IORO.M1,
9
/-
P
, 28,42-47,04-89 MEMORY
-** CONTROL
BUS
MEMORY
CONTROL
RFSH.WR
-► WAIT
7 _
8
VOPCSW
VDPCSR
AB0.1
AB3-7
RD,WR I
KEYBOARD
CONTROL
74 -v 83 — _
-► Y0-Y9
62_
——:£ Y10/SK
66 — 73 _ _
- X0~X7
-*■ REM
2
CMO
64 -
-*■ CAPS
65 -
KANA
*
IOROt Mlf
ABO,
A83-7
RD.WR
PRINTER
INTERFACE
91
BUSY
92-99
-PD80—P0B7
TOO
PSTB
1
0R0,M1,
AB0,1
AB3-7
RO.WR
PERIPHERAL
I/O PORT
CONTROL
m
48-51.55-58 *3
-1- PORT IN
BUS
54,61 X'4
-^ PORT OUT
BUS
I 52,53,59.60 *5
H-PORT IN/OUT
BUS
AB0,1
AB3-7
IORQ ,M1 ,RO,WR (
SOFTWARE
CONTROL
SOUND
GENERATOR
-► SSG SNO
PPI SNO
~ SSG GND
#1 CONT BUS; lORQ.MI.MREQ/RD.RFSH.Wf?
*2 MEMORY CONTROL BUS;CAS2/E,CAS3, CS1 ,CS2, CSlI.MPX,^,™^
SLT1 .SLT2.SLT 01/31 , SLOT 03/33, SLT3730
*3 P0RT ,N BUS; BACK1, BACK 2 ,FWD1, FWD2 ,LEFT 1, LEFT2, RIGHT 1 .RIGHT2
*4 PORT OUT BUS; OUT A ,OUT B
*5 PORT IN/OUT BUS; TR6A1,TRGA2,TRGB1, TRGB2
T6950 (TOSHIBA)
C-MOS VIDEO DISPLAY PROCESSOR (NTSC/PAL)
— TOP VIEW —
ADO~ AD7
CAS
CD0 — CD7
COM VID
CSR
CSW
HCLK 1 ,2
INT
NTSC/PAL
OE
VRAM ADDRESS/DATA
VRAM COLUMN ADDRESS STROBE
CPU DATA
COMPOSITE VIDEO OUTPUT
CPU-VDP READ STROBE
CDP-VDP WRITE STROBE
HALF CLOCK 1,2
CPU INTERRUPT OUTPUT
NTSC/PAL MODE SELECT
VRAM OUTPUT ENABLE
RAS
RD 0 RD7
RESET
VRAM ROW ADDRESS STROBE
VRAM READ/WRITE DATA
RESET IN
TEST
VR/W
WF
X TALI,2
TEST
VRAM READ/WRITE
VRAM WRITE ENABLE
CRYSTAL INPUT
TC4069UBP (TOSHIBA)
C-MOS INVERTER
— TOP VIEW —
F^l
fTs! fiTj [To]
fil I~b1
a-{>>-y=a-<0- y
Y s A
A
Y
0 1
1
0
0; LOW LEVEL
1 ; HIGH LEVEL
HB-50 IP/50 IF
4-5