Diagrams; Block Diagram - Cd Section - Sony HCD-CP101 Service Manual

Hide thumbs Also See for HCD-CP101:
Table of Contents

Advertisement

SECTION 6

DIAGRAMS

6-1.
BLOCK DIAGRAM – CD Section –
OPTICAL
PICK-UP BLOCK
(KSM-213DCP)
RF AMP
FOCUS/TRACKING ERROR AMP
DETECTOR
IC103
VCC
7
D+5V
RF
A
4
5
SUMMING
AMP
B
2
6
C
1
7
D
5
8
F
10
10
FI-V AMP
E
6
11
EI-V AMP
LASER DIODE
AUTOMATIC
LD
LD
POWER
APC LD
3
CONTROL
AMP
Q101
PD
LD
APC PD
AMP
4
PD
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC102
2-AXIS DEVICE
CH2OUTF
12
MOTOR
COIL
CH2OUTR
DRIVE
DRIVE
11
(TRACKING)
(FOCUS)
CH1OUTF
14
COIL
CH1OUTR
13
DRIVE
CH3OUTF
17
MOTOR
M102
M M
CH3OUTR
18
DRIVE
(SLED)
CH4OUTF
15
MOTOR
M101
M M
CH4OUTR
DRIVE
16
(SPINDLE)
MUTE
54 56 53 55
RF EQ
RFO
RFAC
ASYMMETRY
16
51
AMP
CORRECTION
ASYI
49
ASYO
48
FOCUS
FE
14
ERROR AMP
SUBCODE
TE
TRACKING
PROCESSOR
13
ERROR AMP
CPU INTERFACE
14
1
LD ON
22
HOLD SW
21
40
41 39 43
TO
A/D
SERVO
CONVERTER
INTERFACE
IC101 (1/2)
CH2 FIN
TRDR
5
31
CH2RIN
TFDR
6
30
CH1FIN
FRDR
2
33
CH1RIN
FFDR
3
32
CH3FIN
SFDR
24
28
CH3RIN
SRDR
23
29
24
23 22
CH4SIN
25
MUTE
20
FILTER
DIGITAL SIGNAL PROCESSOR,
DIGITAL FILTER, D/A CONVERTER
IC101 (1/2)
DIGITAL
ERROR
OUT
CORRECTOR
16k
RAM
D/A
SERIAL
INTERFACE
DIGITAL
EFM
IN
PLL
DEMODULATOR
INTERFACE
SERVO AUTO
SERVO
DIGITAL
SEQUENCER
INTERFACE
CLV
TO
MIRR/DFCT/FOK DETECTOR
IC101 (2/2)
8
20
6
7
5
2
9
27
26
3
S101
(LIMIT)
DIGITAL SERVO
PROCESSOR
IC101 (2/2)
15
15
D OUT
60
AOUT1
AIN1
LOUT1
DIGITAL
PWM
70
51
71
FILTER
&
BUFFER
AIN2
AOUT2
LOUT2
77
51
76
NOISE SHAPER
INTEGRATOR
CLOCK
GENERATOR
TIMING
LOGIC
66
67
X101
CD +8V
16.9344MHz
Q803
DATA
Q805
Q802
CLK
Q804
LATCH
Q807
SENS
Q806
SQSO
Q808
SQCK
XRST
HOLD
C SCOR
Q802 – 808
CD ON SWITCH
• R-ch is omitted due to same as L-ch.
• SIGNAL PATH
: CD PLAY (ANALOG)
: CD PLAY (DIGITAL)
HCD-CP101
OPTICAL
OPTICAL
TRANSCEIVER
DIGITAL OUT (CD)
IC321
CD-L
72
A
(Page 17)
75
R-CH
DATA, CLK, LATCH,
SENS, SQSO
H
(Page 16)
SQCK, XRST,
HOLD, C SCOR
J
(Page 16)
CD-ON
E
(Page 17)

Advertisement

Table of Contents
loading

Table of Contents