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Block Diagrams, Test Point Overview, and Waveforms
Block Diagram Video
VIDEO
B03A
TUNER IF & DEMODULATOR
+VTUN
7113
TDA9886T/V4
1101
TD1318S/A
9
1102
1
VIF1
5
VIF1
4120
11
IF_ATV
1
MAIN
IF_OUT3
TUNER
2
VIF2
4
VIF2
(ANALOGUE)
1
1103
5
SIF1
23
SIF1
1
4
SIF2
24
SIF2
3111
RF_AGC
14
TAGC
B06B
IO - SCART 1 & 2
1504
1
EXT1
21
SCART1
1506
1
EXT2
21
SCART2
B06A
YPBPR & REAR IO
1615
Pr
EXT4
Y
Pb
D
SIDE FACING SIDE AV
1302
VIDEO
EXT3
1301
1
S VIDEO
5
2
B06C
HDMI
1810
HDMI 1
1811
HDMI 2
LC7.1E LB
+5VS
DEMODULATOR
SUPPLY
7114
EF
SOUND TRAPS
CVBS
17
CVBS_RF
VIF-PLL
4.5 to 6.5 Mhz
SINGLE REFERENCE QSS MIXER
15
INTERCARRIER MIXER AND
AM-DEMODULATOR
1104
SIF AGC
MAD
4M0
I2C-BUS TRANSCEIVER
TUNER AGC
VIF AGC
7503
3535
EF
3537
SC1_RF_OUT_CVBS
19
3528
15
SC1_R_IN
3523
11
SC1_G_IN
3516
7
SC1_B_IN
3545
20
SC1_CVBS_IN
3528
16
SC1_FBL_IN
3518
8
SC1_STATUS
B04A
7500
3522
EF
3521
SC2_CVBS_MON_OUT
19
3529
20
SC2_Y_CVBS_IN
3552
15
SC2_C_IN
3550
8
SC2_STATUS
B04A
3617
HD_Pr_IN
3618
HD_Y_IN
3619
HD_Pb_IN
B04A
MICROPROCESSOR
1304
1304
FRONT_Y_CVBS_IN
2
2
FRONT_Y_CVBS_IN_T
4
FRONT_C_IN
4
FRONT_C_IN_T
3
4
7817
SII9025CTU
1
RX2+A
52
+
R0X2
3
RX2-A
51
-
ADC
4
RX1+A
48
+
121
HDMI_VCLK
R0X1
6
RX1-A
47
ODCK
-
HDMI
7
RX0+A
44
HDMI_DE
(MAIN)
1
+
DE
R0X0
9
RX0-A
43
-
2
HDMI_H
HSYNC
10
RXC+A
40
HDMI_V
+
3
VSYNC
12
R0XC
RXC-A
39
-
19
7814
HDMI_HOTPLUG_RESET
B04A
HDMI_Cb(0-7)
1
RX2+B
71
+
3
R1X2
RX2-B
70
HDMI_Y(0-7)
-
4
RX1+B
67
+
R1X1
6
RX1-B
66
-
HDMI_Cr(0-7)
7
RX0+B
63
+
R1X0
9
RX0-B
62
-
10
RXC+B
59
+
R1XC
12
RXC-B
58
-
19
7860
HDMI_HOTPLUG_RESET
B04A
6.
24
B04B
VIDEO PROCESSOR
7202
SVP CX32-LF
169
CVBS1
ANALOG
MUX
163
CVBS_OUT1
189
VIDEO
PR_R2
181
PROCESSOR
Y_G2
197
PB_B2
205
XTALI
198
PB_B3
1201
173
FB1
14M31
204
XTALO
7204
162
IS42S16400D-6TL
CVBS_OUT2
(0-11)
190
PR_R3
70
DQ(0-31)
(0-15)
FS2
MEMORY
7205
IS42S16400D-6TL
CX_MA
(0-11)
(16-31)
188
PR_R1
180
Y_G1
196
PB_B3
182
Y_G3
192
C
51
TXAn
1210
TXAp
TA1
50
1211
49
TXBn
TB1
48
TXBp
8-BIT
1212
45
TXCn
SINGLE
TC1
44
TXCp
LVDS TX
23
DP-CLK
43
TXCLKn
1213
6
TCLK1
42
TXCLKp
DP_DE_FLD
4
DP_HS
41
TXDn
1214
5
DP_VS
TD1
40
TXDp
DIN_PORTD
(24BIT)
DRAM
1Mx16x4
DRAM
1Mx16x4
TT
TTL/LVDS PANEL
IC2
THC63LVD82
1G51
J1
1
2
VDISP
VDISP
3
4
5
6
7
8
2
1
77
TXAn1
TXAn
TXAp1
4
3
TXAp
78
LVDS
6
5
79
TXBn1
TXBn
RECEIVER
TXBp1
8
7
TXBp
80
12
11
82
TXCn1
TXCn
TXCp1
14
13
TXCp
83
TXCLKn1
18
17
TXCLKn
84
20
19
TXCLKp1
TXCLKp
85
74
VSYNC
73
HSYNC
TXDn1
24
23
TXDn
86
26
25
TXDp1
TXDp
87
75
DE
IC1
THC63LVD82
J3
1
49
L1
RXO0n
2
48
RXO0p
L2
3
47
RXO1n
46
RXO1p
4
L3
5
44
RXO2n
LVDS
6
43
RXO2p
RECEIVER
L4
8
42
RXOCn
41
RXOCp
9
L5
10
40
RXO3n
11
39
RXO3p
TO DISPLAY
L6
12
37
RXE0n
2x LVDS
8
13
36
RXE0p
7
35
L7
RXE1n
15
16
9
34
RXE1p
32
L8
RXE2n
18
19
31
RXE2p
30
L9
RXECn
20
21
29
RXECp
L10
22
28
RXE3n
23
27
RXE3p
28
VDISP
29
30
H_17160_002.eps
270707
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