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Continued from preceding page.
Interface
When the inputs and outputs of devices of different types are connected, incorrect operation may occur due to
discrepancies between the input V
different supply voltages to prevent device destruction in systems that use dual power-supply systems.
Load Capacitance and Output Current
• When a load with a large capacitance is connected, since a load short lasts for an extended period, fused output lines
can be caused. Also, high charge and discharge currents can result in noise which can degrade end product performance
or result in incorrect operation. Always use the recommended load capacitances.
• Large output sink or source currents can also cause the same types of problems described in the previous item. Use the
recommended currents, while taking the maximum allowable power dissipation into account.
Notes on Power Application and Reset
• There are points that require care that are related to power application, the period during which a reset is applied, and
the period after a reset is cleared. Refer to the specific notes provided in the specification sheets for the individual
products, and design end products with these points in mind.
• The pin output states, the pin I/O settings, the contents of registers, and other aspects of this IC are not guaranteed
when power is first applied. Aspects that are defined by the reset operation or by settings are only guaranteed once the
reset or setting has been performed. Applications that use this IC should apply a reset immediately after power is
applied. Pin states and register values that are undefined may differ between samples, and may change between lots
over time. Applications should not depend on undefined states and values.
• The general-purpose I/O ports are set to the input state during a reset. For pins that must be fixed at high or low due to
fail-safe design considerations, pulling up to V
effective design.
• When the 4.2MHz output is used as the microcontroller master clock, the reset circuit will be shared with the
microcontroller. Since the microcontroller will not be reset unless a clock signal is applied, do not control the reset
input to this IC from a microcontroller output port. If this IC has not been reset, the 4.2-MHz output is not guaranteed,
and the microcontroller may not be reset. This can result in incorrect application system operation.
Notes on Thermal Design
The failure rate of semiconductor devices is significantly accelerated by increases in ambient temperature and power
dissipation. To assure high reliability, designs must include adequate margins to take possible changes in ambient
conditions into account.
Notes on Printed Circuit Board Patterns
• If possible, the influence of common impedances should be reduced by separating the V
system.
• The V
and ground lines should be as wide and as short as possible to lower their high-frequency impedance. Ideally,
DD
decoupling capacitors (0.01 to 1 µF) should be inserted between each V
located extremely close to their corresponding power supply system pins. Additionally, it is appropriate to insert a
capacitor of about 100 to 220 µF between V
excessively large capacitors here can result in latch-up.
— In servo systems, the V
lines should be particularly wide, and the recommended driver pattern should be used direct under the power
devices taking heat radiation effect into consideration.
— If a current output type pickup is used, locate the optical sensor connector and the ASP RF input as close together
as possible. If a voltage output type pickup is used, locate the I/V conversion resistor as close to the ASP RF input
side as possible.
• EFM signal lines should be kept as short as possible, and either adjacent lines should be avoided or V
shield lines should be run between adjacent EFM signal lines.
Since the slice level controller output (EFMO) and the ASP clock output (4.2MHz) lines can easily disrupt EFM signal
LC78626KE
/V
and output V
IL
IH
DD
and ground as a low-frequency filter. However, note that using
DD
lines should be handled in the same manner as the V
REF
/V
values. Insert level shifters between devices that have
OL
OH
or pulling down to V
SS
and ground pair. These capacitors should be
DD
through an individual resistor can be an
and ground lines for each
DD
and ground lines. Driver ground
CC
Continued on next page.
or ground
DD
No. 5995-32/34
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