Register Group 1 - Yamaha YM3806 Programmer's Manual

OPQ Programmer's Guide V 1.1
But I like to think this in even simpler way. The setting can be written directly to specific
channel's specific operator by dividing address bits like this:
A7 A6
RG2 RG1
RG2...RG0 (2...7): Register group number according to table 2.
ON1...ON0 (0...3): Channel's operator number, Op0...Op3.
CN2...CN0 (0...7): Channel number.
Examples:
•
Attack rate setting of Ch5, Op0: address = 85H
• Sustain rate setting of Ch1, Op3: address = D9H

4.3 Register group 1

Register group 1 contains operator frequency settings. These settings are not operator
specific, they are operator pair specific. The operator pairs are Op1+Op3 and Op0+Op2
for each channel, so there are 16 operator pairs altogether.
Although there are only 16 frequencies to be set, two for each channel, register group 1
still needs 32 registers. This is because each frequency is set by a 16-bit value, so there
must be a high byte and a low byte for each operator pair.
The address is formatted like this:
A7 A6
0 0
First three bits are 001, because this is register group 1.
H: Is this the high or low byte of the 16-bit frequency value?
P: Operator pair number
CN2...CN0: Channel number 0...7
Examples:
• Frequency of Ch5, Op0 and Op2: hi-byte address = 2DH, lo-byte address = 3DH
•
Frequency of Ch1, Op1 and Op3: hi-byte address = 21H, lo-byte address = 31H
A5 A4
RG0 ON1
A5 A4
1 H
0 = high byte
1 = low byte
0 = Op1 + Op3
1 = Op0 + Op2
A3 A2
ON0 CN2
A3 A2
P CN2
A1 A0
CN1 CN0
A1 A0
CN1 CN0
10