Table of Contents
Advertisement
Description
WRT-847A/847B is comprised of the following:
MB-914 board
Power supply circuit block, Audio circuit block;
DP-341 board
CPU and peripheral circuit block, display and opera-
tion block;
CN-2055 board
Audio input connector;
RF-96 board
PLL and RF circuit block;
. . . . . Audio and peripheral circuit block
The audio signal which is input from the Capsule unit is
input into MB-914 board via CN-2055 board.
The audio signal is input into the Audio Gain/Attenuator
(GAIN/ATT) circuit via the EMI filter.
The GAIN/ATT can be set between _12 to +9 dB in 3 dB
steps by switching the resistance value using analog
switches (IC302, IC307).
The control signal for the analog switch is the 3 bits
(ATT0, ATT1, ATT2) signal that has been sent from the
CPU (IC202).
This signal is set by the information on + or _ switches
(S201 and S202) input to the CPU.
The audio signal which is adjusted the volume by the
GAIN/ATT circuit is amplified by IC309-2/2, then input
into the compressor circuit (IC312).
The audio signal is compressed to a signal level of 2:1 (1/
2) by the compressor circuit and then inputs into the pre-
emphasis circuit. Note that time constant for the pre-em-
phasis is 50 µs.
The audio signal which is limited the amplitude by the
clipping circuit (IC309-1/2) is mixed with the tone signal
(X302, 32.768 kHz) and battery indicator tone signal
(X301, 32.782 kHz), and is sent to the RF circuit block
(RF-96 board).
The A/D converter circuit (IC310, D305) detects the au-
dio signal and converts into DC level voltage. The con-
verted signal (ALO signal) is sent to the CPU and is used
to indicate the input audio signal level on the LCD
(ND201).
WRT-847A/847B
http://getMANUAL.com
Section 6
Block Diagram
. . . . . RF circuit block
The oscillation circuit utilizes the PLL frequency synthe-
sizer method. The VCO (CP401) acts as an oscillator and
modulator for the carrier frequency through voltage con-
trol.
The carrier frequency is controlled by the serial data (PLL
Ref. No. 300s
data) sent from the CPU to the PLL IC (IC402).
The signal amplified by the RF amplifier circuit (Q404,
Q405) is output from the antenna via the isolator (CP403).
Further the voltage comparator (Q401) detects the lock
Ref. No. 200s
condition of the PLL by inputting the output signal (LD
signal) from the phase comparator in the PLL IC, and
sends the signal to CPU.
Ref. No. 100s
The voltage control circuit (Q402, Q403) performs ON/
OFF control of the power voltage (+5.8 V) for the RF cir-
cuit. This control signal is the RFM signal from the CPU.
Ref. No. 400s
(When the RFM signal switches "L", the power is provid-
ed to the RF circuit.)
The RF-power-switching circuit (Q406) toggles the RF
output signal between 50mW and 10mW. This control
signal is a PO-H/L signal from the CPU, and when the
PO-H/L signal is "L," the RF output becomes 10mW.
The EEPROM (IC401) is used to store the setting data.
. . . . . CPU and the peripheral circuit block
The CPU (IC202) is a 4-bit microprocessor, and the clock
is used a 4 MHz (X201, IC201).
The CPU sends out the PLL data, and controls the AF
mute, RF mute, ATT, LCD display, and so on.
The voltage detector circuit (IC203) is used to reset the
CPU.
Also, the reference voltage circuit (R205, C206) generates
a 3.3 V which is used by the CPU as the reference for
detecting battery voltage and AF indicator voltages.
. . . . . Power supply circuit block
The DC-DC converter circuit (IC303, Q301, Q302, Q303,
T301, L302) extracts the +5.8 V from the 3.0 V battery
voltage and supplies to audio and RF section.
The voltage regulator circuit (IC306) extracts the +3.3 V
from the +5.8 V and supplies to PLL and CPU sections.
The power switch circuit performs ON/OFF control of
voltage input to the DC-DC converter.
POWER ON is performed by the power switch circuit
(S301, Q302, D302).
POWER OFF is performed by the power off circuit
(Q302, Q307) detected is informed to the CPU.
6-1
Advertisement
Table of Contents
