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SA-XR70E / SA-XR70EB / SA-XR70EG
SCHEMATIC DIAGRAM - 4
/INTREQ
R1171
10K
R1172
10K
R1002
100
D0
Q0
R1003
100
D1
Q1
R1004
100
D2
Q2
R1005
/DSP_FCS
100
D3
Q3
/FINTREQ
R1006
100
D4
Q4
R1015
R1007
3.3K
100
D5
Q5
R1008
100
D6
Q6
R1009
100
D7
Q7
D0
D1
D2
DSP CIRCUIT
C1148
100P
C1018
100P
R1039
3.3K
144
143
142
R1016
3.3K
1
UHS0
R1017
3.3K
2
UHS1
R1018
33
3
/INTREQ,/ABOQT
4
FSCDIN
5
GPI020
6
FSCCLK
7
FSCDOUT
8
GPI021
R1019
9
FDAT7
10K
10
VDD6
11
VSS6
C1014
R1036
3.3K
12
1
FHS0
R1037
3.3K
13
FHS1
C1013
R1020
10K
100P
14
FDAT6
R1021
33
15
/FCS
R1022
33
16
/FINTREQ
R1023
3.3K
17
FDBCK
R1024
10K
18
FDAT5
R1025
10K
19
FDAT4
20
VDD7
21
VSS7
C1015
R1026
10K
22
FDAT3
1
R1027
3.3K
23
FDBDA
R1028
10K
24
FDAT2
R1029
3.3K
25
DBDA
R1030
3.3K
26
DBCK
R1031
10K
27
FDAT1
R1032
10K
28
TEST
R1033
10K
29
FDAT0
/WE
30
NV_WE
/OE
31
NV_OE
/CE
32
NV_CS
R1034
10K
33
GD-IE
34
EXTD0
35
EXTD1
36
EXTD2
37 38 39 40 41 42 43 44 45
: +B SIGNAL LINE
: MAIN SIGNAL LINE
Z1007
J0JCC0000119
C1024
1
C1028
1
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
IC1006
C2HBZZ000013
DSP IC
46
47
48
49
50
51
52
53
54
55
50
C1049
1
R1062
3K
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
AUDATA3/XMT958A
AUDATA7/XMT958B
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
L1001
G1C2R2K00008
C1011
6.3V100
C1012
6.3V100
109
R1078
33
LRCLK0
108
R1079
33
AUDATA2
107
R1080
33
106
R1082
10K
105
HDATA3
R1081
33
SCLK0
104
R1083
10K
103
HDATA4
AUDATA4
102
VSS2
101
100
VDD2
MCLK
99
R1084
10K
SCLK1
98
R1085
10K
97
HDATA5
R1086
10K
96
HDATA6
R1087
10K
HDATA7
95
94
AUDATA5
AUDATA6
93
92
91
VSS1
VDD1
90
NC1
89
88
NC2
R1088
10K
LRCLK1
87
SCLKN
86
LRCLKN
85
NC3
84
NC4
83
SDATAN0
82
SDATAN1
81
SDATAN2
80
SDATAN3
79
R1089
10K
/SD_CAS
78
R1090
10K
77
/SD_RAS
A3
EXTA3
76
A2
EXTA2
75
A1
74
EXTA1
A0
EXTA0
73
72
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