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UB99
LSI PIN DESCRIPTION
HD6413008VF25 (X4196A00) CPU (MAIN)
PIN
NAME
I/O
NO.
1
V
-
CC
2
CS
/TMO
/TP
/PB
I/O
7
0
8
0
3
CS
/TMIO
/TP
/PB
I/O
6
1
9
1
4
CS
/TMO
/TP
/PB
I/O
5
2
10
2
5
CS
/TMIO
/TP
/PB
I/O
4
3
11
3
6
TP
/PB
I/O
12
4
7
TP
/PB
I/O
13
5
8
TP
/PB
I/O
14
6
9
TP
/PB
I/O
15
7
10
RESO
O
11
V
-
SS
12
T
D
/P9
I/O
X
0
0
13
T
D
/P9
I/O
X
1
1
14
R
D
/P9
I/O
X
0
3
15
R
D
/P9
I/O
X
1
3
16
IRQ
/SCK
/P9
I/O
4
0
4
17
IRQ
/SCK
/P9
I/O
5
1
5
18
D
/P4
I/O
0
0
19
D
/P4
I/O
1
1
20
D
/P4
I/O
2
2
21
D
/P4
I/O
3
3
22
V
-
SS
23
D
/P4
I/O
4
4
24
D
/P4
I/O
5
5
25
D
/P4
I/O
6
6
26
P4
/D
I/O
7
7
27
P3
/D
I/O
0
8
28
P3
/D
I/O
1
9
29
P3
/D
I/O
2
10
30
P3
/D
I/O
3
11
31
P3
/D
I/O
4
12
32
P3
/D
I/O
5
13
33
P3
/D
I/O
6
14
34
P3
/D
I/O
7
15
35
V
-
CC
36
P1
/A
I/O
0
0
37
P1
/A
I/O
1
1
38
P1
/A
I/O
2
2
39
P1
/A
I/O
3
3
40
P1
/A
I/O
4
4
41
P1
/A
I/O
5
5
42
P1
/A
I/O
6
6
43
P1
/A
I/O
7
7
44
V
-
SS
45
P2
/A
I/O
0
8
46
P2
/A
I/O
1
9
47
P2
/A
I/O
2
10
48
P2
/A
I/O
3
11
49
P2
/A
I/O
4
12
50
P2
/A
I/O
5
13
8
（LSI 端子機能表）
FUNCTION
Analog power supply +3.3V
Chip select / / / Port B
Data transmission / Port B
Reset
Ground
Data transmission / Port 9
Data reception / Port 9
Interropt request / Serial clock / Port 9
Data bus / Port 4
Ground
Data bus / Port 4
Port 4 / Data bus
Port 3 / Data bus
Analog power supply +3.3V
Port 1 / Address bus
Ground
Port 2 / Address bus
PIN
NAME
I/O
NO.
51
P2
/A
I/O
6
14
Port 2 / Address bus
52
P2
/A
I/O
7
15
53
P5
/A
I/O
0
16
54
P5
/A
I/O
1
17
Port 5 / Address bus
55
P5
/A
I/O
2
18
56
P5
/A
I/O
3
19
57
V
-
Ground
SS
58
P6
/WAIT
I/O
0
59
P6
/BREO
I/O
Port 6
1
60
P6
/BACK
I/O
2
61
P6
/
I/O
Port 6 / System clock output
7
62
STBY
I
Stand-by mode signal
63
RES
I
Reset
64
NMI
I
Non-maskable interrupt
65
V
-
Ground
SS
66
EXTAL
I
Clock
67
XTAL
O
Clock
68
V
-
Power supply +3.3V
CC
69
P6
/AS
O
3
70
P6
/RD
O
4
Port 6
71
P6
/HWR
O
5
72
P6
/LWR
O
6
73
MD
I
0
74
MD
I
Model control
1
75
MD
I
2
76
AV
-
Power supply +3.3V for A/D
CC
77
V
I
Reference Voltage for A/D
REF
78
AN
/P7
I
0
0
79
AN
/P7
I
1
1
80
AN
/P7
I
2
2
Analog input / Port 7
81
AN
/P7
I
3
3
82
AN
/P7
I
4
4
83
AN
/P7
I
5
5
84
DA
/AN
/P7
I/O
0
6
6
D/A output / Analog input / Port 7
85
DA
/AN
/P7
I/O
1
7
7
86
AV
-
Ground for A/D
SS
87
IRQ
/P8
O
Interropt request / Port 8
0
0
88
CS
/IRQ
/P8
I/O
3
1
1
Chip select / Interropt request / Port 8
89
CS
/IRQ
/P8
I/O
2
2
2
90
ADTRG/CS
/IRQ
/P8
1
3
3
91
CS
/P8
I/O
Chip select / Interropt request / Port 8
0
4
92
V
-
Ground
SS
93
TCLKA/TP
/PA
I/O
0
0
Timer clock / Pulse output / Port A
94
TCLKB/TP
/PA
I/O
1
1
95
TCLKC/TIOCA
/TP
/PA
I/O
Timer clock / Output comparison / Pulse output / Port A
0
2
2
96
TCLKD/TIOCB
/TP
/PA
I/O
Timer clock / Input capture / Pulse output / Port A
0
3
3
97
A
/TIOCA
/TP
/PA
I/O
Address bus / Output comparison / Pulse output / Port A
23
1
4
4
98
A
/TIOCB
/TP
/PA
I/O
Address bus / Input capture / Pulse output / Port A
22
1
5
5
99
A
/TIOCA
/TP
/PA
I/O
Address bus / Output comparison / Pulse output / Port A
21
2
6
6
100
A
/TIOCB
/TP
/PA
I/O
Address bus / Input capture / Pulse output / Port A
20
2
7
7
DM: IC4
FUNCTION
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