Advertisement
6. CIRCUIT DESCRIPTIONS
6 . 1 O U T L I N E O F M A I N S T A G E
Playback Equalizer Circuit
The EQ amplifier employs 2-stage direct-coupled
amplifier, ild
the NFB circuit is designed for
playback equalization with normal (NORM) tapes.
For playback equalization with chrome (CrO2 )
and metal (METAL) tapes, the transistor switch
is turned on to incorporate the RC network in the
output circuit of the EQ amplifier.
Dolby Noise Reduction System
The CT-X5 features the B-type Dolby noise
reduction system (where the S/N ratio is improved
by up to 10dB above SkHz) incorporated in a
Dolby IC (HA1L226).
Recording Amplifier
The recording amplifier uses a single transistor
and has a high frequency peaking circuit in the
emitter, and a trap in the output circuit to prevent
leakage of the recording bias signal. The peaking
response of the high frequency equalization cir-
cuit can be changed to give three different re-
sponses by the TAPE SELECT switches for dif-
ferent types of tape (NORM, CrO, and METAL).
Further, during playback, both the input and
output circuits of this amplifier a^re grounded.
Bias Oscillator
This push-pull oscillator circuit supplies the
erase head with the erase current, and the recording
head with the recording bias current. The dif-
ferent recording bias levels for the different types
of tape (NORM , CrO2 and METAL) are switched
by changing the oscillator power supply voltage
which in turn varies the oscillating power.
6 . 2 C O N T R O L C I R C U I T
The control circuit in this deck utilizes a one-
chip IC (PM9002B) which enables feather-touch
operations. In addition to mechanism control,
this IC also includes music search (MS), auto-stop,
and timer start functions. And due to the digital
counter frequency divider system employed in
timing settings for the mechanism control, all
operational timing discrepancies have been elimi-
nated. The PM9002B pin layout is shown in
Fig. 6-1, the functional block diagram in Fig. 6-2,
and the output pin time charts during different
modes in Figs. 6-3 and 6-4. For interrelations
between circuits, see the block diagram on page 7.
Operations during Each Mode
The mechanical operations effected by the
following circuit changes are described in the next
chapter (see page 14).
".. J
''"t'
v c c
p l t r s e
a-E-
O F F
O
e r a v
f
l,
E N O
P U L S E
R E C
P L A Y
s r o p
n-e w
M 5
T I M I N G
S E N S E
T I M I N G
N O I S E
F I L
S I G N A L
I N
G N D
N O I S E
F I L T E R
x
itw-
si6F
FrIV
TEC
FAUSE
A R
L
T i m a n O
clck OSC
&
d i v r d c r
F i g . 6 - 2
P M 9 0 0 2 B i n t e r n a l b l o c k d i a g r a m
F i g . 6 - 1 P M 9 0 0 2 B p i n l a y o u t
Advertisement
