Stop Mode Release Timing When Initiated By An External Interrupts - Samsung S3C9228 User Manual

8-bit cmos microcontrollers
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S3C9228/P9228_UM_REV1.10
°
(T
= – 25
C to + 85
A
Parameter
Data retention supply
voltage
Data retention supply
current
V
DD
Interrupt
NOTE:
Figure 16-1. Stop Mode Release Timing When Initiated by an External Interrupts
Table 16-3. Data Retention Supply Voltage in Stop Mode
°
C)
Symbol
V
DDDR
I
Stop mode, T
DDDR
V
DDDR
Data Retention Mode
Execution of
STOP Instruction
t
is the same as 16 x 1/f
WAIT
Conditions
°
= 25
C
A
= 2.0 V
Stop Mode
V
DDDR
0.2V
DD
. (f
is basic timer clock selected)
BT
BT
Min
Typ
2.0
Oscillation
Stabillization TIme
IDLE Mode
Normal
Operation Mode
t
WAIT
ELECTRICAL DATA
Max
Unit
5.5
V
1
µA
16-5

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