Sony Glasstron PLM-A35 Service Manual page 39

• RG-A01 BOARD IC801 CXA3017R-T6 (LCD RGB DECODER, LCD DRIVE, LCD TIMING GENERATOR)
Pin No. Pin Name
1 EXT R
2 EXT G
3
EXT B
4
TRAP
5
VDD1
6 LOAD
7
DATA
8
SCLK
9
RPD
10
TEST1
11
BLK
12
CLR
13 HST2
14
HST1
15
XHST1
16 VSS
17 HCK2
18 HCK1
19 XPCG
20 PCG
21 HD
22 XVST
23 VST
24 VCK4
25
VCK3
26
VCK2
27
VCK1
28 XEN1
29 EN1
30 EN2
31 VD
32 DA OUT
33 VDD2
34 DWN
35 RGT1
36 FB PSIG
37 GND3
38 PSIG
39 VCC3
40 B OUT
41 FB B
I/O
I
External digital R signal input terminal Not used (fixed at "L")
I External digital G signal input terminal Not used (fixed at "L")
I
External digital B signal input terminal Not used (fixed at "L")
O
External trap connection terminal Not used (open)
—
Power supply terminal (+3V) (digital system)
I Chip select signal input from the system controller (IC301)
I
Serial data input from the system controller (IC301)
I
Serial data transfer clock signal input from the system controller (IC301)
O
Phase comparator output terminal
I
Input terminal for the test (normally: fixed at "L")
O
Blanking pulse signal output terminal Not used (open)
O
Clear pulse signal output to the left and right LCD units
O Horizontal start pulse 2 signal output to the left and right LCD units
O
Horizontal start pulse 1 signal output terminal Not used (open)
Horizontal start pulse 1 signal output terminal (reverse polarity of the HST1 qf pin)
O
Not used (open)
—
Ground terminal (digital system)
O
Horizontal clock pulse 2 signal output to the left and right LCD units
O Horizontal clock pulse 1 signal output to the left and right LCD units
O
Pre charge pulse signal output terminal (reverse polarity of the PCG w; pin) Not used (open)
O
Pre charge pulse signal output terminal Not used (open)
O
Horizontal drive pulse signal output terminal
O Vertical start pulse signal output to the left LCD unit (reverse polarity of the VST wd pin)
O
Vertical start pulse signal output to the right LCD unit
O
Vertical clock pulse 4 signal output to the left and right LCD units
O
Vertical clock pulse 3 signal output terminal Not used (open)
O
Vertical clock pulse 2 signal output terminal Not used (open)
O
Vertical clock pulse 1 signal output terminal Not used (open)
O
Enable pulse 1 signal output terminal (reverse polarity of the EN1 wl pin) Not used (open)
O Enable pulse 1 signal output terminal Not used (open)
O
Enable pulse 2 signal output to the left and right LCD units
O
Vertical drive pulse signal output terminal Not used (open)
O
DAC signal output terminal Not used (open)
— Power supply terminal (+3V) (digital system)
Up/down scan inversion switching signal output terminal (open collector output)
O
Not used (open)
Left/right scan inversion switching signal output terminal (open collector output)
O
Not used (open)
Capacitor connection terminal for DC voltage feedback circuit of PSIG signal (pin ek)
I
Not used (open)
— Ground terminal (analog system) for PSIG
O
PSIG signal output terminal Not used (open)
—
Power supply terminal (+12V) (analog system) for PSIG Not used
O
B signal (primary color signal) output to the left and right LCD units
I Capacitor connection terminal for DC voltage feedback circuit of B signal (pin r;)
Description
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