1/3) (27Mhz Clock Generator) - Sony RDR-GXD310 Service Manual

For Schematic Diagram
• Refer to page 4-69 for printed wiring board.
• Refer to page 4-4 for waveforms.
2 3 4
1
A-004 BOARD(1/3)
27MHz CLOCK GENERATIOR :Voltage measurement of the CSP IC
and the Transistors with
A -REF.NO.: SERIES- not possible.
XX MARK:NO MOUNT
NO MARK:REC/PB MODE
CN463 8P
GND 1
R463
JL435
CL435 100 PMSBS
PMS_BS 2
R464
JL433
CL433 100 PMSINS
PMS_INS 3
R465
JL430
100 PMSSCLK
NC 4
JL467
Q461
B
NC 5
2SB1462J-R(TX).SO
JL434 P.CONT
PMS_SCLK 6
R466
VCC 7
100
R461
PMS_SDIO 8 3.3
47k
3.3
0
D460
UDZSTE-176.2B
3.3V
C
B+
+3V3
C106
C111 C115 C119 C123
C100
0.1u 0.1u 0.1u
0.1u 0.1u
47u
B B B B B
6.3V
10V 10V 10V 10V 10V
B+
+2V5
C107
C112 C116 C120 C124
C101
0.1u 0.1u 0.1u 0.1u 0.1u
2.5V
47u B
B B B B C126
6.3V
10V 10V 10V 10V 10V
0.1u
B
B+
17
TO(3/3) 10V
D
+1V5
C117
C108 C113 C121 C125
C102
0.1u 0.1u 0.1u 0.1u
1.5V 0.1u
47u B
B B B B
6.3V
10V 10V
10V 10V 10V
B+
EMMA_DAC_+3V3
C114 C118 C122
C170 0.1u 0.1u 0.1u
47u B B B
6.3V
10V 10V 10V
GND
3.3V
E
NAND_ALE
SPDIF
NAND_R/BB
1 NAND_R/BB
TO(2/3)
GPIO1
GPIO1
NAND_CLE
NAND_CLE
F
6 TO(2/3, EMMA_RESET
3/3)
VID_CR
RB103 47x4
AMCK
G
ABCK
7
TO(3/3) ADO
ALRCK
VID_Y
VID_Y
VID_CB
VID_CB
H
RB404 R400
10k
CN406 12P 10k
GND 1
R401
JL406
JTCL
100
JTCL 2
R402
JL407
100
I
JTDO 3 R403
JL408
100
JTMS 4 R404
JL409
100 JTRST
JTRST 5
R405
JL410
100 JTDI
JTDI 6
GND 7
3.3V 8
R406
JL411 CL411
100
JEDINT 9
14
SYS_RESET 10 STS_RESET TO(3/3)
J
GND 11
GND 12
GPIO1
8
TO(3/3) GCS1B
K
RXD0B
RXD0B
RXD1B
RXD1B
9 TO(3/3)
TXD0B
TXD0B
TXD1B
TXD1B
RDATA[0]
RDATA[0]
RDATA[1]
RDATA[1]
L
RDATA[2]
RDATA[2]
VID_Y
RDATA[3]
RDATA[3]
RDATA[4]
RDATA[4] VID_CB
RDATA[5]
RDATA[5]
RDATA[6]
RDATA[6]
RDATA[7]
2
TO(2/3) RDATA[7]
RDATA[8]
RDATA[8]
RDATA[9]
RDATA[9]
M
RDATA[10]
RDATA[10]
RDATA[11]
RDATA[11]
RDATA[12]
RDATA[12]
RDATA[13]
RDATA[13]
RDATA[14]
RDATA[14]
RDATA[15]
RDATA[15]
N
16
5 6 7 8 9
mark,is
CL109
Q460
3.3
UN5211-TX
SWITCH JL109
R460
4700 0
C133
0.1u
JTCL B
10V
204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189
VDD1
C127
0.1u GND
B
10V GND
CBPC
C128
0.1u
CBPD
B
10V
CBPE
C129
AGND4
0.1u
PMSINS
B
DSR1B/PMSINS
10V
RDATA[11]
RDATA11/HSD3
RDATA[5]
RDATA5
RDATA[12]
RDATA12/HSD4
NAND_ALE
ATX
ADO
PPORT2
PMSSCLK
PPORT5/PMSSCLK
JL431
DCD1B/PMSPON
TEST
R108
SDA0
100
SDA0
JTDI
R102 JTDI
100
JTRST
JTRST
RSTSWB
VAR
C132
R173
470p
0 AVDD1
B
50V
AGND2
R192
AVDD3
10k
AVDD4
AVDD5
OFF0
RDATA[4]
RDATA4
NAND_CLE
NAND_CLE
JL126
TXD1B
ALRCK
ABCK
JL170
PPORT1
JL171
PPORT4
PMSBS
RI1B/PMSBS
TMODE2
EDINT
R113
SCL0
100
SCL0
JTDO
CL130
R149
10k NMI
CL101
JL101
EIVHS
R151
AGND1
10k
CBPB
C130
0.1u AVDD0
CL170
B
10V VACOMP
AVDD2
RB100
RDATA[3] 10kx4
RDATA3
NAND_R/BB
NAND_R/BB
JL100 CL100 R105
47
GCSB1
RXD1B
JL127
PWMOUT
AMCK
PPORT0
JL173
R193 PPORT3
4700
TMODE0
TMODE1
R196
SDA1
100
SDA1
R197
SCL1 100
SCL1
JTMS
R194
4700
RSTOUT
CL104
JL104
EIVVS
CBPA
C131
R150
0.1u
10k AGND0
B
10V
VAG
R172
AGND3
0
VAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
RB102
47x4
JL135
RB113
10kx4
4-5
10 11 12 13
CL113
JL113
R130
47
R198
47
188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153
IC100
IC100
UPD61120AF1-100-JN1-A
CSP(CHIP SIZE PACKAGE)IC
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
JL108
CL108
RDR-GXD310/HXD710/HXD910
14 15 16 17 18
152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137
AGND1_16
AVDD1_16
AVSYSCLKIN
GND
GND
GND
GND
GND
VDD1
FE_DATA[4]
RADD22/STPDAT4
FE_VALID
RADD16/STPEN
FE_DATA[3]
RADD21/STPDAT3
EVCK
SYSCLKIN
AVDD1_162
VDD1
VDD1
VDD1
VDD1
VDD2
VDD1
RADD[12]
RADD12
FE_DATA[5]
RADD23/STPDAT5
FE_CLK
RADD15/STPCLK
AGND1_162
CLK27IN
AVDD1_266
R107
VDD3
47
FCSB0
FE_DATA[7]
RADD25/STPDAT7
RADD[7]
RADD7
FE_DATA[6]
RADD24/STPDAT6
MCLKIN
AGND1_266
AGND1_6
GND
VDD3
RADD[5]
RADD5
PPORT28
RADD[6]
RADD6
C136
0.1u
VRCLKIN B
B+
10V
AVDD1_6
C134 C135
VVS
0.1u
0.1u
CL184
B B
VDD1
10V 10V
GND
GRDYB
RADD[4]
RADD4
CL188
PPORT31
CL189
R115
PPORT35
47 JL114
FCSB1
CL185
VHS
PPORT43
JL120
PPORT33
RADD[2]
RADD2
JL121
PPORT32
RADD[3]
RADD3
VDO_CLK
VCK
STPERRB
R148
PPORT42 10k
VFIELD
CL142
DQ[1]
DQ1
DQ[3]
DQ3
DQ[5]
DQ5
DQ[7]
DQ7
DWEB
DWEB
GND2
VDD2
GND2
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
4-6
19 20 21
CN462 18P
GP_FE_RESET
1 FE_Reset
JL417
FE_VALID
2 FE_Valid
RADD[0]
RADD[0]
FE_PACKET_SYNC
3 FE_Psync
RADD[1]
RADD[1] JL418
4 GND
RADD[2] CL419
RADD[2] JL419
FE_CLK
5 FE_CLK
RADD[3]
RADD[3]
RADD[4] 6 GND
RADD[4] JL427
FE_DATA[7]
RADD[5] 7 FE_DATA7
RADD[5] JL426
FE_DATA[6]
8 FE_DATA6
RADD[6]
RADD[6] 10 JL425
FE_DATA[5] TO
9 FE_DATA5
RADD[7] DE-001
RADD[7] JL424
FE_DATA[4]
TO BOARD
10 FE_DATA4
RADD[8]
RADD[8] (3/3) CN002
11 GND
RADD[9] (SEE PAGE
RADD[9] JL423
FE_DATA[3]
4-28)
12 FE_DATA3
RADD[10]
RADD[10] JL422
FE_DATA[2]
13 FE_DATA2
RADD[11]
RADD[11] JL421
FE_DATA[1]
14 FE_DATA1
RADD[12]
RADD[12] JL420
FE_DATA[0]
15 FE_DATA0
RADD[13]
RADD[13]
RADD[14] 16 GND
RADD[14] CL472
SCL1
17 I2C_CLK1
CL473
SDA1
18 I2C_DAT1
RB463
FB460 CN460 20P
FB461
100x4 0uH
VDO_D[1] 0uH 1 GND
2 DTT_V7
VDO_D[3]
3 DTT_V6
VDO_D[4] FB462
FB463
0uH
4 DTT_V5
VDO_D[6] 0uH
5 DTT_V4
6 GND
VDO_D[7]
RB464
FB464
VDO_D[5] 100x4 0uH FB465 7 DTT_V3
0uH
VDO_D[2] 8 DTT_V2
VDO_D[0] 9 DTT_V1
TO
FB466
10 DTT_V0
FB467 RD-058
0uH
0uH
BOARD
11 GND
CN2300
12 GND
(SEE PAGE
13 GND 4-65)
R469
R468
14 GND
100 0
VDO_CLK
15 DTT_VCLK
16 GND
CL470
SCL0
17 DTT_I2C_C
CL471
SDA0
18 DTT_I2C_D
19 GND
1
15 DTT_RST
TO(3/3) 20 DTT_RST
X200
C202 27MHz
1p
CK IC201
50V
KA5SDKASO1TSL
1.7
C203
XTB XT
1p IC201
1.8
CK
50V
N.C N.C
C206
CLOCK GENERATOR
C208
1.7 3.3 0.1u
0.1u VC VDD B
B
10V
10V
1.7
R238
VSS Q0
10k
R237
FB260 47
RB105
B+
C207
10kx4
0.001u
JL117 B
50V
FCS0B
CL117
GP_INTB
11
TO(3/3)
GP_JIG_MODE
CL112 JL112
DAMON_GRDYB
+1V5
18 TO(3/3)
GND
FOEB
13
TO(3/3)
FWEB
FOEB
FOEB
FWEB
FWEB 12 TO(2/3)
FCS1B
DADD[0]
DADD[0]
DADD[1]
DADD[1]
DADD[2]
DADD[2]
DADD[3]
DADD[3]
DADD[4]
DADD[4]
DADD[5]
DADD[5]
DADD[6] 3
TO(2/3)
DADD[6]
DADD[7]
DADD[7]
DADD[8]
DADD[8]
DADD[9]
DADD[9]
DBA0
DBA0
DADD[10]
DADD[10]
DBA1
DBA1
DADD[11]
DADD[11]
DCASB
DCASB
DADD[12]
DADD[12]
DCLK
DCLK
DQ[0] DCLKB
DQ[0] DCLKB
DQ[1] DCSB
DQ[1] DCSB
DQ[2] DQM0
5
DQ[2] DQM0 TO(2/3)
DQ[3] DQM1
DQ[3] DQM1
DQ[4] DQS0
DQ[4] DQS0
DQ[5] DQS1
DQ[5] DQS1
DQ[6] DRASB
DQ[6] DRASB
DQ[7]
DVREF
DQ[7] DVREF
4
DQ[8] TO(2/3)
DWEB
DQ[8] DWEB
DQ[9]
DQ[9]
DQ[10]
DQ[10]
DQ[11]
DQ[11]
DQ[12]
DQ[12]
DQ[13]
DQ[13]
DQ[14]
DQ[14]
DQ[15]
DQ[15]
27MHz CLOCK GENERATOR
A-004 (1/3)