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• AT27PC512
PLCC Top View
A7
A15 VCC A13
A12 NC
A14
4
2
32
30
A6
5
3
1
31
29
A5
6
28
7
A4
27
A3
8
26
9
A2
25
A1
10
24
A0
11
23
NC
12
22
O0
13
21
15
17
19
14
16
18
20
O2
NC
O4
O1 GND
O3
O5
Vcc
GND
OE, CE AND
OE/VPP
PROGRAM LOGIC
CE
Y DECODER
A0-A15
ADDRESS
INPUTS
X DECODER
• TC4S66F
V
DD
IN/OUT
CONTROL
V
SS
• DAP 202K
3
1
Pin Name Function
A0-A15
A8
O0-O7
A9
A11
CE
NC
OE/VPP
OE/Vpp
A10
CE
NC
O7
O6
Mode/Pin
DATA OUTPUTS
Read
O0-O7
Output Disable
Standby
OUTPUT
Pid Program
BUFFERS
GM Inhibit
Y-GATING
Duct Identification
CELL MATRIX
IDENTIFICATION
OUT/IN
2
Addresses
Outputs
Chip Enable
Output Enable/Vpp
No Connect
CE
OE/V
V
V
IL
IL
V
V
IL
IH
V
X
(1)
IH
(2)
V
V
IL
PP
V
V
IH
PP
(4)
V
V
IL
IL
IN/OUT 1
5
V
DD
OUT/IN 2
3
4
V SS
CONT
• 2SB 1132 (KTA 1664)
23
33
Ai
Outputs
PP
Ai
D
OUT
X
(1)
High Z
X
High Z
Ai
D
IN
X
(1)
High Z
A9=V
(3)
IdentificationCode
H
A0=V
or V
IH
IL
A1-A15=V
IL
3
2
1
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