Yamaha PDX-30 Service Manual page 22

A B C
PDX-30/PDX-50
MAIN
1
2
3
4
To wireless module
IN L
CB2
0
3.4
0
0
0 0
0 0
3.4 3.4
0
3.4
3.4 3.4
5
0 0
3.4
3.0
3.4
3.4
2.7 2.7
CB1
6
REGULATOR
JK1
DC IN
15 V
7
8.4
0
IC1
8
9
10
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
★ Components having special characteristics are marked
and must be replaced ●
with parts having specifications equal to those originally installed. パーツリストに記載されている部品を使用してください。
★ Schematic diagram is subject to change without notice.
● 本回路図は標準回路図です。改良のため予告なく変更することがございます。
22
D E F
IC7
AUDIO
CB4
PROCESSOR
REGULATOR
IC6
IC2
0
IC3
印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
G H I
PDX-50
OUT L
15.4 0
3.4 0
1.7
0
1.7
0
IC8
0 0
1.7 0
DIGITAL
0 3.3
0
3.3
AMPLIFIER
0 3.3
No replacement part available.
3.5 3.7
サービス部品供給なし
3.5 3.7
Group select
switch
IC11
0
0
MICRO-
3.4 0
PROCESSOR
3.3
0.5
3.2 3.3
IC10
0 0
3.3 3.4
0 0
1.9 0
1.8 0
0
0
0 A 0
3.4 0
No replacement part available.
サービス部品供給なし
2
1 B
3.3
3.3
0
IC9
0 1.8
POINT B 1 / Pin 5, 2 / Pin 1 of IC9
POINT A XL1 (Pin 9 of IC10)
5 pin 1
1 pin 2
POWER cable ON
J K L
IC2: NJM2370U05
Voltage regulator
V V
IN OUT
CONT Thermal
Protection
NOISE
BYPASS
Bandgap
Reference
GND
–
CB5
DRIVER L
YE
+
BU
RE
WH +
DRIVER R
–
3.4 3.4
PLIMIT
0.6 2.6 GAIN0
GAIN1
SLEEPN
MUTEN
NCDRC0
NCDRC1
PVDDREG
AVDD
VREF
STATUS
indicators
CB6
(Writing port)
IC10: R5F21246SNFP
Single chip 16 bit microprocessor
I/O ports
5 pin 1
1 pin 2
POWER cable OFF POWER cable OFF
M N
IC6: BD9870FPS-E2
High stand voltage 1 channel step-down switching regulator
VCC
1
VREF
PWM COMP DRIVER
OSC
STBY
5
STBY
CTL
LOGIC OUT
2
OCP
TSD
INV
Error AMP
4
SS
FIN
GND
IC7: LC75348M
Single-chip electronic volume and tone control system
4 3 2 1 30 29 28 27
5 26
LOUT
ROUT
LBASS2
RBASS2
6 25
7 24
LBASS1 RBASS1
23
8
LTRE RTRE
9 22
RIN
LIN
10 21
LSELO RSELO
11 12 13 14 15 16 17 18 19 20
IC9: BD5230FVE-TR
Voltage detector IC with adjustable output delay
V
DD
5
1 Vout
–
+
Vref
2 SUB
4
3
GND CT
IC8: YDA147-SZE2
Digital audio power amplifier
Lch
Feed Back PVDDPL
OUTPL
INLP
Gain Power PWM Level
Logic PVSSL
Control Limit Amp Shift
INLM
OUTML
MUTE
Feed Back PVDDML
CKIN CKOUT
SLEEPN
Non-Clip MUTEN
3.3V Oscillator OTP
DRC MUTE OCP
Regulator Control Control
UVLO
VREF/
PROTN
REF
Feed Back PVDDPR
MUTE
OUTPR
INRP
Gain Power PWM Level
Logic
Control Limit Amp Shift PVSSR
INRM
OUTMR
Feed Back PVDDMR
Rch
NC 1 36
NC
2 35
NC NC
3 34
PVDDREG GAIN1
AVDD 4 33
GAIN0
INLP 5 32
NCDRC1
6 31 NCDRC0
INLM
VREF 7 30
CKIN
INRM 8 29 CKOUT
INRP 9 28 MUTEN
AVSS 10 27 PROTN
PLIMIT 11 26 SLEEPN
NC 12 25 NC
8 8 8 6 3 3 8
Port P0 Port P1 Port P2 Port P3 Port P4 Port P6
Peripheral functions
A/D converter System clock
(10 bits x 12 channels) generation circuit
Timers
XIN-XOUT
High-speed on-chip oscillator
Timer RA (8 bits) Low-speed on-chip oscillator
Timer RB (8 bits) UART or
XCIN-XCOUT
Timer RD clock synchronous serial I/O
(16 bits x 2 channels) (8 bits x 2 channels)
Timer RE (8 bits)
I C bus interface or clock synchronous 2
serial I/O with chip select
(8 bits x 1 channel)
LIN module
(1 channel)
Watchdog timer R8C/Tiny Series microprocessor core Memory
(15 bits)
R0H R0L SB ROM (1)
R1H R1L
USP
R2
ISP
R3
RAM (2)
INTB
A0
PC
A1
FLG
FB
Multiplier
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.