M2 Board Schematic - Sony KV-32FQ80B Service Manual

Trinitron color tv
Table of Contents

Advertisement

A
B
C
1
M2.-32/36FQ80
2
R248
3.3k
R249
R123
3.3k
4.7k
CS/Disable
DISABLE
1
R136
XX
GND
AGC_MON
2
FB103
R127
0
Q102
GND
3
0uH
R144
3
DTC144EKA
100k
KEY2/SCL3.3
4
+3.3V
MS SHUT DOWN
5
FB104
0uH
AGC_Defeat
R125
KEY1/SDA3.3
6
4.7k
P2[8]
FB105
INT_COL
7
0uH
RESP.LED/RESET
/RESET
8
SCL0_5V
AV LINK IO
9
AVL_INT
SIRCS/AVL_INT
10
SCL0_5V
SCL
11
SDA0_5V
FB106
0uH
GND
12
SDA0_5V
SDA
13
FB107
GND
4
14
R134
R137
0uH
SDA2_5V
10k
Q105
10k
RESET AUDIO
15
FB108
2SC1623
GND
16
0uH
Reset_Audio
+3.3V
CVBS IN (TXT)
17
R142
10k
GND
18
Q104
2SC1623
RESET100
19
Reset100
R126
RESET
20
/RESET
10K
R141
TXTBLK
21
10k
FB109
XX
P2[10]
EMMA_isolation
22
Q101
TXTB
23
2SC1623
B
STDBY
ST.BY
24
R240
R138
5
100k
TXTG
25
10k
G
PROT
PROT
26
FB135
0uH
TO A BOARD
TXTR
27
R
AC_ON/OFF
CN1000
ACON/OFF
28
1k
R130
NC
29
R139
R143
GND
30
SDA2_5V
10k
8.2k
SDA_DIG
31
FB111
0uH
GND/CVBS2_IN
32
VP100
33
+5V
34
+5V_IN
HP100
35
6
5V
36
GND
37
+3.3V_IN
5V ST/3.3V ST_MAIN
38
R132
10k
AUDIO MUTE
39
FB112
0uH
dig_spare
40
P2[13]
FB129
CN100
XX
40P
R133
10k
R140
10k
Q103
2SC1623
Audio_Mute
7
R146
R147
P3[3]
R145
10k
8
9
M2
MICRO PROCESSOR AND TEXT DECODER
10
11
D
E
F
+2.5VCORE
+3.3V
R101
R100
XX
0
IC101
R102
C101
PST6001MT
Q100
10k
XX
Q116
XX
DTC114YKA
VCC
OUT
GND
R124
0
/RESET
C100
C150
XX
0.47
B
+3.3V
R158
R161
R167
2.2k
2.2k
2.2k
R159
Q108
10k
2SK2036
+5V
Q109
R150
2SK2036
SCL0
2.2k
R181
10k
+5V
R164
10k
R151
R242
SDA0
Q117
2.2k
XX
2SC1623
+5V
R170
R152
10k
4.7k
R243
XX
SDA2
Q111
SCL1
2SK2036
SDA1
R244
SCL_3.3
XX
SDA2
+5V
COR/RSTOUT
C105
0.1
+3.3VCPU
R171
1K
C103
33p
C109
100p
R174
X100
1.8K
6MHz
Q112
2SA1037AK
R183
R172
R163
33p
100
C104
1K
0
+2.5VANA
R177
47
2SA1037AK
Q113
R
R175
R173
1K
1.8K
G
R178
47
Q114
2SA1037AK
B
R176
1.8K
R179
47
R165
R246
0
1.8k
C107
R166
R168
R169
0.1
1.8k
3.3k
3.3k
C110
C108
100p
0.1
AGC_MON
R245
100k
+2.5VANA
P5[2]
P5[3]
180
R182
10k
Test-LED
XX
Q106
2SC1623
R185
10k
R180
10k
CN103
XX
G
H
I
CN104
6P
RED
R187
10k
R188
+3.3V
3.3k
R189
3.3k
C113
0.1
16V
Q118
Q120
B
DTC114YKA
DTC114YKA
8
7
6
5
IC104
M24C32-WMN6T(A)
Q119
DTC114YKA
1
2
3
4
R184
10k
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
97
P6.2
98
P6.3
99
P6.4
100
P6.5
101
P6.6
102
VSYNC
103
HSYNC
104
COR/RSTOUT
105
BLANK/CORBLA
106
VDD33
107
VSS33
108
XTAL1
109
XTAL2
110
VSSA
111
VDDA
IC103
112
R
SDA6000-B11
G
113
114
B
115
VSSA
VDDA
116
117
CVBS2
118
VSSA
VDDA
119
120
CVBS1B
121
CVBS1A
VSSA
122
123
VDDA
124
P5.0
P5.1
125
126
P5.2
127
P5.3
128
TMODE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C114
+2.5VCORE
100p
RB100
22
R200
4.7k
+5V_IN
C130
10
50V
FL101
+3.3V_IN
EMI
C131
10
50V
FL102
EMI
IC106
KF25BDT
FL103
I
O
EMI
C128
G
0.22
10V
B
C129
C132
FL104
0.22
10
R186
10V
50V
82
EMI
B
- 50 -
J
K
L
M
R213
R214
R215
R216
R217
XX
XX
4.7k
XX
XX
RB108
0
A[12]
A[11]
40
A[10]
41
A[9]
42
A[8]
43
A[19]
44
R229
0
A[18]
1
A[17]
2
RB109
0
3
A[7]
4
A[6]
5
A[5]
6
A[4]
RB110
0
RB119
22
66
65
D[2]
D[12]
D[5]
D5
64
D[9]
D9
63
D13
62
C120
0.1
RB117
22
VDD33
61
D[13]
C121
VSS33
60
100p
D[1]
D1
59
D[6]
D6
58
D[8]
D8
57
D[14]
R218
D14
56
0
D[0]
D0
55
D[7]
D7
54
D[15]
VDD33
53
VSS33
52
RB118
22
D15
51
/WR
IC105
C122
WR
50
MT48LC8M16A2TG-75
RB102
22
LDQM
0.1
LDQM
49
UDQM
C123
VDD
VSS
UDQM
48
100p
/RD
DQ0
DQ15
RD
47
D[0]
/CSROM
VDDQ
VSSQ
CSROM
46
/CLKEN
D[1]
CLKEN
DQ1
DQ14
45
D[2]
/CSSDRAM
DQ2
DQ13
CSSDRAM
44
D[3]
RB103
MEMCLK
43
VSSQ
VDDQ
22
CLK
RB120
VDD33
DQ3
DQ12
42
33
R212
330
DQ4
DQ11
VSS33
41
D[4]
A[15]
VDDQ
VSSQ
A15/CAS
40
RB104
22
A[14]
D[5]
DQ5
DQ10
A14/RAS
39
D[6]
A[13]
DQ6
DQ9
A13
38
D[7]
A[0]
VSSQ
VDDQ
A0
37
A[1]
RB121
DQ7
A1
DQ8
36
33
A[2]
VDD
VSS
A2
35
LDQM
A[3]
LDQM
NC
A3
34
A[4]
/WR
/WE
UDQM
A4
33
A[15]
RB105
/CAS
CLK
A[14]
22
/RAS
CKE
/CSSDRAM
/CS
NC
31
32
A[12]
BA0/A12
A11
A[13]
+3.3VMEM
BA1/A13
A9
R201
A[10]
0
A8
A10
A[0]
C118
C119
A0
A7
100p
0.1
A[1]
A1
A6
A[2]
A2
A5
A[3]
RB101
A3
A4
22
C124
VDD
VSS
0.1
16V
B
C125
100p
FL100
+5V
EMI
C140
C145
R232
C135
47
0.1
100p
0
35V
16V
CH
+3.3V CPU
R233
0
C136
C141
C146
47
0.1
100p
+3.3V
35V
16V
CH
R234
0
+3.3V MEM
C137
C142
C147
R235
100p
47
0.1
0
CH
35V
16V
+2.5V ANA
C143
C138
C148
R236
0.1
47
100p
0
16V
35V
CH
+2.5V CORE
C139
C144
C149
R237
47
0.1
100p
0
35V
16V
CH
~ M2 Board Schematic Diagram [ MicroProcessor and Text Decoder ] ~
N
O
RB111
RB113
0
22
39
38
37
36
35
34
33
32
31
30
29
RB115
22
D[13]
A11
Q13
28
D[5]
A10
Q5
27
D[12]
A9
Q12
26
D[4]
A8
Q4
25
R238
A19
IC107
VCC
24
XX
/WR
M27V160-100K1
NC,VSS,A20
NC
23
D[11]
A18
Q11
22
D[3]
A17
Q3
21
D[10]
A7
Q10
20
D[2]
A6
Q2
19
A5
Q9
18
RB116
22
7
8
9
10
11
12
13
14
15
16
17
R231
XX
RB112
RB114
0
22
D[15]
D[14]
D[13]
D[12]
RB122
33
D[11]
D[10]
C126
0.1
D[9]
D[8]
RB123
C127
100p
33
R227
22
UDQM
CLK
R228
RB106
0
0
/CLKEN
A[11]
A[9]
A[8]
RB107
0
A[4]
A[5]
A[6]
A[7]
R247
0
Y
GND
A
Vcc
NC
IC108
XX
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents