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Table 6-6. Runtime checkpoint codes (Continued)
Checkpoint
code
24h
The configuration required before interrupt vector initialization has completed.
Interrupt vector initialization is about to begin.
25h
Interrupt vector initialization is complete. Clearing the password if the POST DIAG
switch is on.
27h
Any initialization before setting video mode is performed next.
28h
Initialization before setting the video mode is complete. Configuring the
monochrome mode and color mode settings next.
2Ah
Bus initialization system, static, output devices are done next, if present.
2Bh
Passing control to the video ROM to perform any required configuration before the
video ROM test.
2Ch
All necessary processing before passing control to the video ROM is done. Looking
for the video ROM next and passing control to it.
2Dh
The video ROM has returned control to BIOS POST. Performing any required
processing after the video ROM had control.
2Eh
Completed post-video ROM test processing. If the EGA/VGA controller is not
found, performing the display memory read/write test next.
2Fh
The EGA/VGA controller was not found. The display memory read/write test is
about to begin.
30h
The display memory read/write test passed. Look for retrace checking next.
31h
The display memory read/write test or retrace checking failed. Performing the
alternate display memory read/write test next.
32h
The alternate display memory read/write test passed. Looking for alternate display
retrace checking next.
34h
Video display checking is over. Setting the display mode next.
37h
The display mode is set. Displaying the power on message next.
38h
Initializing the bus input, IPL, and general devices next, if present. See Table 6-7 for
additional information.
39h
Displaying bus initialization error messages. See Table 6-7 for additional
information.
3Ah
The new cursor position is read and saved. Displaying the Hit <DEL> message next.
40h
Preparing the descriptor tables next.
POST checkpoint codes
Description
6
6-11
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