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SYNTAX: (bd,An,Rn)
bd
An
Rn
Figure 3-4. Using Absolute Address with Indexes
Scaling does not add to the EA calculation time. However, when combined with
the appropriate derived modes, scaling produces additional capabilities.
Arrayed structures can be addressed absolutely and then subscripted; for
example, (bd, Rn
*
SCALE). Optionally, an address register that contains a
dynamic displacement can be included in the address calculation (bd, An, Rn
*
SCALE). Another variation that can be derived is (An, Rn
*
SCALE). In the first
case, the array address is the sum of the contents of a register and a
displacement (see Figure 3-5). In the second example, An contains the address
of an array and Rn contains a subscript.
3.5.2 General Addressing Mode Summary
The addressing modes described in the previous paragraphs are derived from
specific combinations of options in the indexing mode or a selection of two
alternate addressing modes. For example, the addressing mode called register
indirect (Rn) assembles as address register indirect if the register is an address
register. If Rn is a data register, the assembler uses address register indirect
with index mode, with a data register as the indirect register, and suppresses
the address register by setting the base suppress bit in the EA specification.
Assigning an address register as Rn provides higher performance than using a
data register as Rn. Another case is (bd, An), which selects an addressing
mode based on the size of the displacement. If the displacement is
16
bits or
less, the address register indirect with displacement mode (d16, An) is used.
When a 32-bit displacement is required, the address register indirect with index
(bd, An, Xn) is used with the index register suppressed.
MOTOROLA
3-16
DATA ORGANIZATION AND
CPU32 REFERENCE MANUAL
ADDRESSING CAPABILITIES
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