HP 200 Series Services And Applications page 32

Architecture and Technology
Router 650 Hardware
Routing Engine Architecture
Figure 5. Block Diagram of Routing Engine
CPU The routing engine PCA for the HP Router 650 uses the 33-mega-
hertz Intel i960 CF RISC processor.
Data RAM Program variables and data critical to packet throughput
(such as routing and bridging tables) are stored in a fast memory.
Packet RAM Four megabytes of multiported packet RAM are used.
Packet sizes up to eight kilobytes can be processed.
Cache RAM 128 kilobytes of high-speed RAM are used for external
processor code and data cache.
PCMCIA Flash EEPROM The flash memory on the removable
PCMCIA card is used for nonvolatile storage of the operating system
code and the configuration data. The PCMCIA card can be replaced to
update the operating system code, or to provide more memory for
updating through electronic media.
Self-Test EPROM This stores the router's self test and console-
downloading code.
Timer This generates interrupts and internal clocking for WAN ports.
Console Port Controller
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