Fujitsu 8FX Hardware Manual page 402

CHAPTER 21 MULTI-PULSE GENERATOR
21.1 Overview
Asynchronous State Change
WTS[1:0] = 0b00
Synchronous State Change
WTS[1:0] = 0b10
Note:
Directly changing from one PPG synchronization mode to another PPG synchronization
mode (e.g. from rising-edge synchronization to falling-edge synchronization or vice versa)
is prohibited. To change from one PPG synchronization mode to another PPG
synchronization mode, disable PPG edge synchronization temporarily before changing to
another PPG synchronization mode.
● Input position detect control
The input signal at the multi-pulse generator input pins (SNI2 to SNI0) is used to detect the
rotor position of the DC motor. There is a noise filter for all SNI2 to SNI0 input and Table
21.1-2 shows the noise width for noise filter of SNI2 to SNI0 pins. The followings are
conditions for the input position detect circuit:
• 3 edge selection for all SNI2 to SNI0; Rising edge, falling edge and both edges.
• Compare the levels of SNI2 to SNI0 inputs with RDA[2:0] bits in the output data register
upper (OPDUR:RDA[2:0]).
After above condition met, the writing timing signal will be generated for the data transfer
between the OPDBRHx and OPDBRLx registers and the OPDUR and OPDLR registers.
Furthermore, the edge detection for individual input (SNI2 to SNI0) can be disable/enable.
380
Figure 21.1-2 PPG Falling Edge Synchronization
PPG
OP5
OP4
OP5'
OP4'
The sequencer changes its
state (e.g. due to a reload
timer underflow).
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
Glitch
MN702-00009-2v0-E