Register Naming Convention; Command Register; Device Control Register; Table 24 Register Naming Convention And Correspondence - Hitachi HTS542516K9SA00 Specifications

11.1 Register naming convention

This specification uses the same naming conventions for the Command Block Registers as the
ATA8-ACS standard. However, the register naming convention is different from that uses in the
Serial ATA 2.6 specification. The following table defines the corresponding of the register names
used in this specification with those used in the Serial ATA 2.6 specification.
Serial ATA register name
Features
Features (exp)
Sector count
Sector count (exp)
LBA low
LBA low (exp)
LBA mid
LBA mid (exp)
LBA high
LBA high (exp)
Device
Command
Control
Status
Error

Table 24 Register naming convention and correspondence

11.2 Command register

This register contains the command code being sent to the device. Command execution begins
immediately after this register is written. The command set is shown in "Table 40 Command set".
All other registers required for the command must be set up before writing the Command Register.

11.3 Device Control Register

7 6
- -

Table 25 Device Control Register

Bit Definitions
SRST (RST) Software Reset. The device is held reset when RST=1. Setting RST=0 reenables the device.
Register name in this
specification when writing
registers
Feature current
Feature previous
Sector count current
Sector count previous
LBA low current
LBA low previous
LBA mid current
LBA mid previous
LBA high current
LBA high previous
Device
Command
Device Control
N/A
N/A
Device Control Register
5 4
- -
Page 44 of 171
5K250 (SATA) OEM Specification
Register name in this
specification when reading
registers
Sector count HOB=0
Sector count HOB=1
LBA low HOB=0
LBA low HOB=1
LBA mid HOB=0
LBA mid HOB=1
LBA mid HOB=0
LBA mid HOB=1
Device
N/A
N/A
Status
Error
3 2
1 SRST -IEN
1 0
0