Sharp PZ-50HV2U Service Manual page 60

PZ-50HV2, PZ-50HV2E
PZ-50HV2U
FS781BZB (DIGITAL VIDEO ASSY : IC1802)
• Low EMI Clock IC
Pin Assignment (Top View)
1
Xin
Xout 2
FS78x
S1 3
LF 4
8 Pin SOIC Package
Block Diagram
Xin
1(3)
Xout
2(4)
VDD
8(2)
Pin Function
No. Pin Name I/O
1/2 Xin/Xout I/O
7/3 S0/S1 I
4 LF I
6 FSOUT O
8 VDD P
5 VSS P
8 VDD
7 S0
6 FSOUT
5 VSS
250 K
Reference
Divider
8 pF
Modulation
Control
8 pF
Power Contol
VDD Input Control Logic
Logic
5(7) 3(5)
VSS S1
Type
Pins form an on-chip reference oscillator when connected to terminals of an external parallel
Analog resonant crystal. Xin may be connected to TTL/CMOS external clock source. If Xin connected to
external clock other than crystal, leave Xout (pin2) unconnected.
Digital control inputs to select input frequency range and output frequency scaling. Refer to
CMOS/TTL
Tables 7 and 8 for selection. S0 has internal pulldown. S1 has internal pullup.
Loop Filter. Single ended tri-state output of the phase detector. A two-pole passive loop filter is
Analog
connected to Loop Filter (LF).
Modulated Clock Frequency Output. The center frequency is the same as the input reference
frequency for FS781. Input frequency is multipled by 2X and 4X for FS782 and FS784
CMOS/TTL
respectively.
Power Positive Power Supply
Power Power Supply Ground
Loop Filter
4(6)
Phase
Detector
VCO
10 pF.
VCO / N
Output
Divider
and
Mux
VSS
(TSSOP Pin #)
7(1)
S0
Function
60
FSOUT
6(8)