HP 8082A Operating And Service Manual page 20

3-26
3 - 2 7 The following section indicates
cations of the 8082A.
Digital Applications
3-29
The 9082A can be used to test the following
digital integrated circuit {IC) logic families at their normal
operating speeds:
RTL
DTL
TTL
Schottky TTL
ECL (including MECL iii) Ins - 4ns
For convenience of operation a special
available on the 8082A. This means that by simply sett-
ing either amplitude range switch to the ECL position, an
output pulse width a voltage swing of
is produced into an open circuit.
When using the 8082A to test any of the above logic
families, particularly the fast MECL lli logic, it is im-
portant to operate with a 50 ohm transmission system.
The coaxial cable does not need to be terminated at the
mination of the 8082A is of sufficiently high quality to
provide a clean pulse shape in almost all cases (see para-
graph 3-31) without an external termination, even at
the fastest transition times, This has the advantage that
it enables the 50 ohm coaxial cable to be soldered
directly to the pins of the
a 50 ohm terminating resistor. it should be noted, how-
ever, that when no external termination is used, no
connections can be made at any intermediate point
along the transmission cable. For example, suppose the
pulse on leaving the 8082A has 2V amplitude across
an effective 25 ohms (50 ohm internal termination in
parallel with 50 ohm cable); when the pulse reaches the
This 4V is reflected back along the cable and is absor-
bed by the 50 ohm termination in the 8082A with only
2% typical reflection at amplitudes up to 4V. The effect
of this action is to produce the stepped pulse shown in
Propagation delay per gate
30ns
3ns
. . . . . .
o v
Figure 3-8. Stepped pulse with high-Z output
3 - 3 0
timings is to be made, a l
with a high impedance input probe should be used. The
probe should be connected at the IC pin and not at any
intermediate point along the 50 ohm cable.
If a number of K's on one PC board are
being driven from one point on the board and the
printed circuit track is more than
external 50 ohm resistor at the end of the 50 ohm
system may be required to preserve the clean pulse
shape at the IC input pins.
to
3 - 3 2 One point
testing Ins ECL, is the loss of edge speed due to the
coaxial cable. However, the 8082A is fast enough to
accommodate this edge speed degradation without ex-
ceeding the manufacturers specification. A 1.23 metre
cable is available as HP Accessory number 10503A.
3 - 3 3 When testing flip-flops (Motorola MC1666
for example), twu pulse generators are required, one to
provide the clock input and one to provide the data in-
put. One pulse generator is run in square wave mode
and the other is run in external trigger and double pulse
mode and is synchronized from the trigger output of the
first pulse generator (Figure 3-9). Allowance must
be made for the differential delay that will occur be-
tween the two ourputs. This is caused by the fact that
there is an extra 7ns delay in the second 8082A t24ns
against 17ns) due to the delay between the trigger input
and the trigger output. To preserve the correct timing
relationship, therefore, between the two sets of pulse
outputs, the data pulse output must be delayed by a
further 7ns. This can be achieved by increasing the length
of the data output transmission cable (delay is about 5ns
Pulse at the internal
ohm load or along
50
the cable.
Pulse at
the open
end of the coax
remember, particularly when