Table of Contents
Advertisement
TV (sync signal generator): master
Clock
HSYNC
(4FSC)
EXHSYNC EXVSYNC
CLK1
Figure 3-16
• Synchronization System Switching Mode
This mode is used to switch to master mode if the external sync signal generator malfunctions
during operation in TV sync mode.
The processing sequence in this case is as follows: detection of malfunction , set this mode,
switch CLK1 to a clock supplied by a different system, then set master mode.
Refresh Control: The number of refresh cycles for the UGM connected to the Q2 is set in bits
REF3–0 (refresh cycle count) in the display mode register (DSMR).
Bit 3: REF3 Bit 2: REF2 Bit 1: REF1 Bit 0: REF0 Operation
0
0
*
*
The setting made in bits REF3–0 is the number of refreshes per raster. This value should be
calculated as shown in table 3-4.
VSYNC
Field signal
ODDF
Q2: slave
FCLK (FSC)
SuperH
Signal Flow in TV Sync Mode
0
0
*
*
Data
MIXER
DD
DCLK
CDE
UGM
Refresh timing is not output.
Refresh timing is set to any value
from 1 to 15 cycles, and output.
Display
53
Advertisement
Table of Contents
