Instruction Pointer (Ip) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

5.1.18 INSTRUCTION POINTER (IP)

The instruction pointer (IP) is adopted by all the S3C8/S3F8 series microcontrollers to control the optional high-
speed interrupt processing feature called fast interrupts. The IP consists of register pair DAH and DBH. The
names of IP registers are IPH (high byte, IP15–IP8) and IPL (low byte, IP7–IP0).
5.1.19 FAST INTERRUPT PROCESSING
The feature called fast interrupt processing allows an interrupt within a given level to be completed in
approximately 6 clock cycles, rather than the usual 16 clock cycles. To select a specific interrupt level for fast
interrupt processing, write the appropriate 3-bit value to SYM.4–SYM.2. Thereafter, to enable fast interrupt
processing for the selected level, set SYM.1 to "1".
Two other system registers support fast interrupt processing:

The instruction pointer (IP) contains the starting address of service routine (and is later used to swap the
program counter values)

When a fast interrupt occurs, the contents of FLAGS register are stored in an unmapped, dedicated register
called FLAGS' ("FLAGS prime").
NOTE: For the S3F84B8 microcontroller, the service routine for any one of the eight interrupt levels (IRQ0–IRQ7) can be
selected for fast interrupt processing.
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5 INTERRUPT STRUCTURE