Name
USBH_CLK
USBH_DIR
USBH_NEXT
USBH_STOP
USBH_DATA[0:7]
MSM7201A
Figure. USB block(MSM7201A Side & ISP1508AET Side)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Note
Input clock from PHY
Controls the direction of USBH_DATA. When high, data is driven into
the MSM.
Used by the PHY to throttle data.
Signals the end of a USB transmit packet or a register write operation,
and optionally stops any receive.
Bi-directional data pin
Table. HSUSB Signal Interface
PM7540
USBH_CS
USBH_CLK
USBH_DIR
ISP1508AET
USBH_NEXT
USBH_STOP
USBH_DATA[0:7]
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3. TECHNICAL BRIEF
USBH_DM
u-USB Connector.
USBH_DP
LGE Internal Use Only