Sony CDX-V7800X Service Manual page 19

Pin No. Pin Name
146 VSS
147 RESERVED
148 VDATA3
149 VDD
150 VDATA4
151 VSS
152 VDATA5
153 RESERVED
154, 155 VDATA6, 7
156 RESERVED
157 HSYNC
158 VSYNC
159 NC
160 VDD
161 NC
162 VSS
163, 164 DA-DATA1, 2
165 VDD2.5
166 DA-LRCK
167 DA-BCK
168 VDD2.5
169 DA-XCK
170 VSS
171 DAI-DATA
172 DAI-LRCK
173 DAI-BCK
174 RESERVED
175 VDD
176 A-VDD
177 VCLK
178 SYSCLK
179 A-VSS
180 CD-DATA
181 VDD
182 CD-LRCK
183 VSS
184 CD-BCK
185 CD-C2PO
186 – 190 RESERVED
191 NC
192 RESERVED
193 VDD
194 NC
195 VSS
196 VSS1
197 VDD2.5
198 VSS1
199 VSS
200 VSS1
201 HOST8SEL
202 – 204 HADDR0 – 2
205 DTACKSEL
206 CS
I/O
— Ground
I Fixed at L in this set.
O Video data bus 3 output
— Power supply pin (+3.3 V)
O Video data bus 4 output
— Ground
O Video data bus 5 output
I Fixed at L in this set.
O Video data bus 6 and 7 output
I Fixed at L in this set.
I/O Horizontal sync input/output
I/O Vertical sync input/output
O Not used. (Open)
— Power supply pin (+3.3 V)
O Not used. (Open)
— Ground
O Serial audio samples relative to DA-BCK clock.
— Power supply pin (+2.5 V)
O PCM left-right clock output
O PCM bit clock output
— Power supply pin (+2.5 V)
O Audio external frequency clock output
— Ground
I PCM input data, two channels.
I PCM input left-right clock
I PCM input bit clock
I Fixed at L in this set.
— Power supply pin (+3.3 V)
— Analog power supply pin (+3.3 V)
I Video clock input
I system clock input
— Analog ground
I Serial CD data input
— Power supply pin (+3.3 V)
I Programmable polarity 16-bit word synchronization to the decoder (right channel HIGH).
— Ground
I CD bit clock input
I Asserted HIGH indicated a corrupted byte.
I Fixed at L in this set.
O Not used. (Open)
I Fixed at L in this set.
— Power supply pin (+3.3 V)
O Not used. (Open)
— Ground
— Ground
— Power supply pin (+2.5 V)
— Ground
— Ground
— Ground
I Host select input
I Host address bus 0 – 2 input
I Data acknowledge select input
I Host chip select input
Pin Description
19