Sony HCD-DP1000D Service Manual page 64

HCD-DP1000D
QQ
3 7 63 1515 0
IC001 SP3728AC (RF-240 BOARD)
64 63
1
RF IF
INPUT
ATT
2 BUS
RF IN
3
CP
WIN 4
WPP 5
6
CN
ADD
+ – – +
A2 7
EQ
B2
8 EQ
C2
9 EQ
10 EQ
D2
GCA
TE
L 13942296513
11
CLAMP
D
12 CLAMP
C
13
B
CLAMP
A 14
CLAMP
E 15
CLAMP
F
16
CLAMP
CLAMP
CLAMP
www
VC
REG.
VDD
.
17 18 19 20 21 22
64
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62 61 60 59 58 57 56
FULL WAVE
VDD
INPUT
VGC
BUS
+
CLAMP HOLD
–
PHASE
+
DET.
+
PHASE
DET.
AMP
ADD
A+C AMP
GCA
B+D
GCA
OFFSET
G+H
AMP
GCA
E+F
GCA
ADD
LD SEL APC GAIN
SEL APC LD DRV
x ao
y
VSS
i
23 24 25 26
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8
55 54 53
AGC
VSS
CHARG
PUMP
BUTTOM
ERR
PROGRAMBLE
EQ.FILTER
LEVEL
DEL
ADC
MPX LPF GCA
TOCA
2
Q Q
3 6 7 1 3
TOCA
70kHz
AGC
GCA
LPF
70kHz
LPF
LEVEL
AGC
COMP
LDON
LD SEL.
MPX BIAS
u163
.
27 28 29
2 9 9 4 2 8
52 51 50 49
SELIAL
DEW
PORT
DECODER
CONTROL SIG
HOLD
TPA
RF HOLD EN
MON
RF AGC HOLD
SEL
+
–
VPC
TE
FWT
1 5 0 5 8 2 9 9 4
VC
TOP
HOLD
COMP
– SEL
DEFECT
LEVEL
GAC
–
VC
DF
CHAGE
PUMP
MPCPI
m
BOTTOM
HOLD –
co
30 31 32
9 9
48 SDEN
47
SCLK
46
SWD
45
SRD
44 MON
2 8 9 9
43 TPH
42
FE
41
TE
40 TZIN
39
VCI
38
DET
37
TZC
36 PI
35
PII
34
BYP2
33 MIRR