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Acer Extensa 61X Service Manual

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TI Extensa 61X Series
(AcerNote 370P) Notebook
Service Guide
PART NO.: 2238309-0809
DOC. NO.:
PRINTED IN USA

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Summary of Contents for Acer Extensa 61X

  • Page 1 TI Extensa 61X Series (AcerNote 370P) Notebook Service Guide PART NO.: 2238309-0809 DOC. NO.: PRINTED IN USA...
  • Page 2 Any Acer Incorporated software described in this manual is sold or licensed "as is". Should the programs prove defective following their purchase, the buyer (and not Acer Incorporated, its distributor, or its dealer) assumes the entire cost of all necessary servicing, repair, and any incidental or consequential damages resulting from any defect in the software.
  • Page 3 About this Manual Purpose This service guide contains reference information for the Extensa 610 notebook computer. It gives the system and peripheral specifications, shows how to identify and solve system problems and explains the procedure for removing and replacing system components. It also gives information for ordering spare parts.
  • Page 4 Related product information AcerNote 370P User's Manual contains system description and general operating instructions. M1521, M1523 and M7101 Data Sheets contain information on the Acer chips. C&T 65550 Data Sheet contains detailed information on the Chips & Tech. VGA controller.
  • Page 5 Conventions The following are the conventions used in this manual: Text entered by user Represents text input by the user. Denotes actual messages that appear onscreen. Screen messages NOTE Gives bits and pieces of additional information related to the current topic. WARNING Alerts you to any damage that might result from doing or not doing specific actions.

  • Page 7: Table Of Contents

    Table of Contents Chapter 1 System Introduction Overview.......................... 1-1 1.1.1 Features ......................1-2 1.1.2 Rear Ports ......................1-3 1.1.3 Indicator Light ....................1-4 1.1.4 System Specifications Overview ............... 1-5 System Board Layout......................1-7 1.2.1 Main Board (PCB No: 96149-SC) ..............1-7 1.2.2 Audio Connection Board (PCB No:96467-1)............
  • Page 8 1.4.17 Keyboard......................1-23 1.4.17.1 Windows 95 Keys ................1-23 1.4.18 FDD .......................1-24 1.4.19 HDD.......................1-24 1.4.20 CD-ROM......................1-25 1.4.21 Battery......................1-25 1.4.22 Charger ......................1-26 1.4.23 DC-DC Converter...................1-27 1.4.24 DC-AC Inverter....................1-27 1.4.25 LCD .......................1-28 1.4.26 AC Adapter ....................1-29 Software Configuration and Specification ...............1-30 1.5.1 BIOS ......................1-30 1.5.1.1 Keyboard Hotkey Definition............1-30 1.5.1.2...
  • Page 9 ALI M7101 (Power Management Unit) ................2-24 2.4.1 Features ......................2-24 2.4.2 Pin Diagram....................2-25 2.4.3 Pin Description ....................2-26 2.4.4 Different Pin definition setting ............... 2-34 2.4.5 Numerical Pin List ..................2-36 2.4.6 Alphabetical Pin List..................2-37 2.4.7 Function Description..................2-38 C&T 65550 High Performance Flat Panel/CRT VGA Controller........
  • Page 10 2.9.5 Pin Diagram ....................2-94 2.9.6 Pin Description....................2-95 2.9.7 Functions Description..................2-96 2.9.7.1 Charge Function ................2-96 2.9.7.2 Discharge Function..............2-96 2.9.7.3 Safety Concerns................2-97 2.10 T62.061.C DC-DC Converter ..................2-98 2.10.1 Pin Diagram ....................2-98 2.10.2 Pin Assignment ....................2-98 2.10.3 Specifications ....................2-99 2.10.4 Control......................2-100 2.10.5 Application: ....................2-100 2.11 T62.064.C DC-AC Inverter (11.3”) ................2-102 2.11.1...
  • Page 11 System Security........................ 3-6 3.4.1 Floppy Disk Drive Control ................3-6 3.4.2 Hard Disk Drive Control .................. 3-6 3.4.3 System Boot Drive Control................3-7 3.4.4 CD-ROM Bootable................... 3-7 3.4.5 Serial Port 1 Base Address ................3-8 3.4.6 Parallel Port Base Address ................3-8 3.4.7 Parallel Port Operation Mode ................
  • Page 12 Disassembling the Inside Frame Assembly ..............4-10 4.5.1 Removing the Heat Sink Assembly ..............4-10 4.5.2 Removing the Internal Drive ................4-11 4.5.3 Replacing the CPU ..................4-12 4.5.4 Removing the Display ..................4-13 4.5.5 Detaching the Top Cover................4-14 4.5.6 Removing the Base Assembly .................4-16 4.5.7 Removing the Motherboard ................4-17 4.5.8...
  • Page 13 List of Figures Notebook.......................... 1-1 Rear Ports ........................1-3 Indicator Light ......................... 1-4 Main Board Layout (Top Side) ..................1-7 Main Board Layout (Bottom Side)..................1-8 Audio Connection Board Layout (Top Side) ..............1-9 Battery Connection Board Layout (Top Side) ..............
  • Page 14 2-14 PCI-to-CardBus terminal assignments ................2-62 2-15 NS87336VJG Block Diagram ..................2-77 2-16 NS87336VJG Pin Diagram.....................2-78 2-17 YMF715 Block Diagram ....................2-88 2-18 T62.062.C Pin Diagram....................2-94 2-19 T62.061.C Pin Diagram....................2-98 2-20 T62.064.C DC-AC Inverter Top Overlay diagram ............2-104 2-21 T62.064.C DC-AC Inverter Bottom Overlay diagram ...........2-104 2-22 T62.066.C DC-AC Inverter Top Overlay diagram ............2-107 2-23...
  • Page 15 4-20 Removing the Battery Connector Board................4-18 4-21 Unplugging the LCD Cover Switch and Speaker Cables..........4-18 4-22 Removing the Charger Board ..................4-19 4-23 Detaching the Motherboard from the Inside Assembly Frame......... 4-19 4-24 Removing the PC Card Slot Unit..................4-20 4-25 Removing the Keyboard Connection Board ..............
  • Page 16 List of Tables Port Descriptions ......................1-3 Indicator Status Descriptions ....................1-4 System Specifications .......................1-5 System Specifications (continued)..................1-6 CPU Voltage (S1) Settings....................1-13 CPU Speed (SW3) Settings.....................1-13 Multi-Function Switch (SW2) Settings ................1-13 Memory Address Map ....................1-14 Interrupt Channel Map ....................1-14 DMA Channel Map......................1-15 1-10 I/O Address Map ......................1-15 1-11...
  • Page 17 1-28 CD-ROM Specifications....................1-25 1-29 Battery Specifications..................... 1-25 1-30 Charger Specifications ....................1-26 1-31 DC-DC Converter Specifications..................1-27 1-32 DC-AC Inverter Specifications..................1-27 1-33 LCD Specifications ......................1-28 1-34 AC Adapter Specifications ..................... 1-29 1-35 Hotkey Descriptions ....................... 1-30 1-36 Standby Mode Conditions and Descriptions..............
  • Page 18 2-14 NS87336VJG Pin Descriptions ..................2-79 2-15 YMF715 Descriptions.....................2-89 2-16 T62.062.C Absolute Maximum Ratings Table ..............2-92 2-17 T62.062.C Electrical Characteristics Table ..............2-92 2-18 T62.062.C Pin Description table..................2-95 2-19 T62.061.C Pin Descriptions....................2-98 2-20 MAXIMUM RATINGS....................2-102 2-21 Electrical Characteristics ....................2-102 2-22 Pin Description......................2-103 2-23 Pin Description......................2-103 2-24...

  • Page 19: Chapter 1 System Introduction

    C h a p t e r C h a p t e r System Introduction This chapter introduces the notebook, its features, components and specifications. Overview The notebook was designed with the user in mind. The figure below shows the notebook with the display open.

  • Page 20: Features

    1.1.1 Features Here are just a few of the notebook’s many features: Performance High-end Pentium microprocessor Support 64-bit main memory and external (L2) cache memory Large LCD display (DualScan STN and TFT active matrix.) PCI local bus video with graphics acceleration and 1MB video RAM boost video performance Internal 3.5-inch floppy drive or CD-ROM drive High-capacity, Enhanced-IDE hard disk Lithium-Ion or Nickel Metal-Hydride battery pack...

  • Page 21: Rear Ports

    1.1.2 Rear Ports DC-in Port Serial Port Microphone-in Port Parallel Port Line-in Port External CRT Port Line-out Port PS/2 Port External Floppy Drive Connector Figure 1-2 Rear Ports The following table describes these ports. Table 1-1 Port Descriptions Icon Port Connects to...

  • Page 22: Indicator Light

    Indicator Light Indicator Light Figure 1-3 Indicator Light This two-way indicator light allows you to see the notebook status when the display is open or closed. The indicator serves both as a power and battery-charging indicator. See Table 1-2. Table 1-2 Indicator Status Descriptions Indicator Status Power Switch...

  • Page 23: System Specifications Overview

    1.1.4 System Specifications Overview Table 1-3 System Specifications Item Standard Optional Microprocessor Intel Pentium™ processor Intel P55CLM - 133/150 with MMX (Intel P54CSLM 120/133/150 MHz) System memory 8MB / 16MB Expandable to 64MB using 8, 16 and 32MB Dual 64-bit memory banks soDIMMs Flash ROM BIOS 256KB...

  • Page 24: System Specifications (Continued)

    Table 1-3 System Specifications (continued) Item Standard Optional I/O ports (continued) One 3.5mm minijack mic-in port Microphone One 3.5mm minijack line-in port Audio CD player or other line-in devices One 3.5mm minijack line-out port Speakers or headphones Operating system Windows 95 Windows 3.1 Weight (includes battery)

  • Page 25: System Board Layout

    System Board Layout 1.2.1 Main Board (PCB No: 96149-SC) Note: This switch setting is not for Extensa 610 use. Figure 1-4 Main Board Layout (Top Side) System Introduction...

  • Page 26: Main Board Layout (Bottom Side)

    Figure 1-5 Main Board Layout (Bottom Side) Service Guide...

  • Page 27: Audio Connection Board (Pcb No:96467-1)

    1.2.2 Audio Connection Board (PCB No:96467-1) Figure 1-6 Audio Connection Board Layout (Top Side) 1.2.3 Battery Connection Board (PCB No:95498-1) Figure 1-7 Battery Connection Board Layout (Top Side) Figure 1-8 Battery Connection Board Layout (Bottom Side) System Introduction...

  • Page 28: Hdd Connection Board (Pcb No:96463-1)

    1.2.4 HDD Connection Board (PCB No:96463-1) Figure 1-9 HDD Connection Board Layout (Top Side) Figure 1-10 HDD Connection Board Layout (Bottom Side) 1-10 Service Guide...

  • Page 29: Keyboard Connection Board (Pcb No: 96465-1)

    1.2.5 Keyboard Connection Board (PCB No: 96465-1) Figure 1-11 Keyboard Connection Board Layout (Top Side) Figure 1-12 Keyboard Connection Board Layout (Bottom Side) System Introduction 1-11...

  • Page 30: Jumpers And Connectors

    Jumpers and Connectors CN8 CN9 CN10 CN11 CN12 CN13 CN14 CN15 CN17 CN16 CN18 CN19 Golden Finger for Debug Card NOTE: The shaded area (Black) indicates the position of the switch. External PS/2 keyboard/mouse port CN12 Audio Board Connector VGA port CN13 PCMCIA socket connector Parallel port CN14 Diskette Drive connector...

  • Page 31: Cpu Voltage (S1) Settings

    Table 1-4 CPU Voltage (S1) Settings CPU Voltage 2.35V 2.45V 2.9V 3.1V Switch 1 Switch 2 Switch 3 Switch 4 Table 1-5 CPU Speed (SW3) Settings CPU Speed 120MHz 133MHz 150MHz Switch 1 Switch 2 Switch 3 Switch 4 Table 1-6 Multi-Function Switch (SW2) Settings Switch Keyboard Type (Default OFF)

  • Page 32: Hardware Configuration And Specification

    Hardware Configuration and Specification 1.4.1 Memory Address Map Table 1-7 Memory Address Map Address Range Definition Function 000000 - 09FFFF 640 KB memory Base memory 0A0000 - 0BFFFF 128 KB video RAM Reserved for graphics display buffer 0C0000 - 0CBFFF Video BIOS Video BIOS 0E0000 - 0EFFFF...

  • Page 33: I/O Address Map

    0083 Audio 0081 Diskette 0082 Audio (option)/ECP(option) Cascade Cascade 008B 0089 Spare 008A 1.4.4 I/O Address Map Table 1-10 I/O Address Map Address Range Device 000 - 00F DMA controller-1 020 - 021 Interrupt controller-1 040 - 043 Timer 1 048 - 04B Timer 2 060 - 064...

  • Page 34: M7101 Gpio (General Purpose I/O) Port Definition

    1.4.5 M7101 GPIO (General Purpose I/O) Port Definition Table 1-11 M7101 GPIO Port Definition Item Description GPIOA2 Smart inverter contrast counter control GPIOA3 0: Normal operation of system 1: Shutdown system GPIOA4 Serial data on X24C02 GPIOA5 Battery gauge communication control GPIOA6 Battery data line GPIOA7...

  • Page 35: System Memory

    Item Specification BIOS vendor Acer BIOS version v2.1 BIOS in flash EPROM (Y/N) BIOS ROM size 256KB BIOS package type 32-pin TSOP Same BIOS for STN color/TFT color (Y/N) The BIOS can be overwritten/upgradeable using the “AFLASH” utility (AFLASH.EXE). Please refer to software specification section for details.

  • Page 36: Second-Level Cache

    The following table lists all possible memory configurations. Table 1-14 Memory Configurations Slot 1 Slot 2 Total Memory 8 MB 0 MB 8 MB 0 MB 8 MB 8 MB 8 MB 8 MB 16 MB 16 MB 0 MB 16 MB 0 MB 16 MB...

  • Page 37: Video Memory

    1.4.10 Video Memory Table 1-15 Video RAM Configuration Item Specification DRAM or VRAM DRAM(EDO type) Fixed or upgradeable Fixed Memory size/configuration 1MB (256K x 16 x 2pcs) Memory speed 60ns Memory voltage 3.3V Memory package TSOP 1.4.11 Video Table 1-16 Video Hardware Specification Item Specification...

  • Page 38: Lcd Resolution Support

    1280x1024x16 1.4.11.2 LCD Resolution Support Table 1-18 Supported LCD Resolutions Resolution x Color on LCD Only TFT LCD (SVGA) STN LCD (SVGA) 640x480x16 640x480x256 640x480x65,536 640x480x16,777,216 800x600x16 800x600x256 800x600x65,536 1024x768x16 1024x768x256 DSTN color number: 256 colors TFT color number: 65536 colors Maximum resolution (LCD Panel): 800x600 Maximum resolution (External CRT): 1280x1024 Using software, you can set the LCD to a higher resolution than its physical resolution, but...

  • Page 39: Parallel Port

    1.4.12 Parallel Port Table 1-19 Parallel Port Configurations Item Specification Number of parallel ports ECP/EPP support Yes (set by BIOS setup) Connector type 25-pin D-type Location Rear side Parallel 1 (3BCh, IRQ7) Selectable parallel port (by BIOS Setup) Parallel 2 (378h, IRQ7) Parallel 3 (278h, IRQ5) Disable 1.4.13...

  • Page 40: Audio

    1.4.14 Audio Table 1-21 Audio Specifications Item Specification Chipset YMF715 Audio onboard or optional Built-in Mono or stereo Stereo Resolution 16-bit Compatibility SB-16 , Windows Sound System Mixed sound sources Voice, Synthesizer, Line-in, Microphone, CD Voice channel 8-/16-bit, mono/stereo Sampling rate 44.1 kHz Internal microphone Internal speaker / quantity...

  • Page 41: Touchpad

    1.4.16 Touchpad Table 1-23 Touchpad Specifications Item Specification Synaptics TM1002MPU Vendor & model name Power supply voltage (V) Location Palm-rest center Internal & external pointing device work simultaneously Support external pointing device hot plug X/Y position resolution (points/mm) Interface PS/2 (compatible with Microsoft mouse driver) 1.4.17 Keyboard Table 1-24...

  • Page 42: Fdd

    1.4.18 Table 1-26 FDD Specifications Item Specification Vendor & model name Mitsumi D353F2 Floppy Disk Specifications Media recognition 2DD (720K) 2HD (1.2M, 3-mode) 2HD (1.44M) Sectors / track Tracks Data transfer rate (Kbits/s) Rotational speed (RPM) Read/write heads Encoding method Power Requirement Input Voltage (V) +5 ±...

  • Page 43: Cd-Rom

    Item Specification Performance Specifications Data transfer rate 16.6 (max., PIO 16.6 (max., PIO 16.6 (max., PIO 16.6 (max., PIO (host-buffer, Mbytes/s) mode 4) mode 4) mode 4) mode 4) DC Power Requirements Voltage tolerance (V) 5 + 5%, -10% 1.4.20 CD-ROM Table 1-28 CD-ROM Specifications...

  • Page 44: Charger

    1.4.22 Charger To charge the battery, place the battery pack inside the battery compartment and plug the AC adapter into the notebook and an electrical outlet. The adapter has three charging modes: Rapid mode The notebook uses rapid charging when power is turned off and a powered AC adapter is connected to it.

  • Page 45: Dc-Ac Inverter

    Item Specification Vendor & model name Ambit T62.061.C.00 Input voltage (Vdc) 8~21 Output Rating 3.3V 2.9V +12V 5VSB (2.35/2.45/2.9/3.1V) Current (w/ load, A) 0~3.2 0~3.3 0~3.0 0~0.15 0~0.1 0.005 Voltage ripple (max., mV) Voltage noise (max., mV) OVP (Over Voltage Protection, V) 6.5~8.2 4.5~6.2 3.3~5.0 for...

  • Page 46: Lcd

    1.4.25 Table 1-33 LCD Specifications Item Specification Vendor & model name HITACHI TORiSAN GOLDSTAR LMG9900ZWCC LM-FH53-22NAW ITSV45E LP121S1-J Mechanical Specifications LCD display area 11.3 11.3 11.3 12.1 (diagonal, inch) Display technology Resolution SVGA (800x600) VGA (800x600) SVGA (800x600) SVGA (800x600) Supported colors 262,144 colors 262,144 colors...

  • Page 47: Ac Adapter

    1.4.26 AC Adapter Table 1-34 AC Adapter Specifications Item Specification Vendor & model name Delta ADP-45GB REV.E2 Input Requirements Nominal voltages (Vrms) 90 - 264 Frequency variation range (Hz) 47 - 63 Maximum input current (A, @90Vac, full load) 1.5 A Inrush current The maximum inrush current will be less than 50A and 100A when the adapter is connected to 115Vac(60Hz) and...

  • Page 48: Software Configuration And Specification

    Software Configuration and Specification 1.5.1 BIOS The BIOS is compliant to PCI v2.1, APM v1.2, E-IDE and PnP specification. It also defines the hotkey functions and controls the system power-saving flow. 1.5.1.1 Keyboard Hotkey Definition The notebook supports the following hotkeys. Table 1-35 Hotkey Descriptions Hotkey...

  • Page 49: Power Management

    1.5.1.3 Power Management Figure 1-14 Power Management Block Diagram System Introduction 1-31...

  • Page 50: Standby Mode Conditions And Descriptions

    ON MODE Normal full-on operation STANDBY MODE The notebook consumes very low power in standby mode. Data remain intact in the system memory until battery is drained. The necessary condition for the notebook to enter standby mode is that the reserved disk space size for saving system and video memory is insufficient so the notebook is unable to enter hibernation mode.
  • Page 51 A necessary condition for the notebook to enter hibernation mode is that the reserved space for saving system information on the hard disk must be larger than the combined system and video memory size. Under such conditions, the standby/hibernation hotkey acts as the hibernation hotkey. See the user’s manual for information on the Sleep Manager utility.

  • Page 52: Display Standby Mode Conditions And Descriptions

    Table 1-37 Hibernation Mode Conditions and Descriptions Condition Description The condition to enter “Hard Disk Drive” is not [Disabled] in System Security of BIOS SETUP. Hibernation Mode “Hard Disk 0” is not [None] in Basic System Configuration of BIOS SETUP. HDD has already located enough free contiguous disk space generated by the Sleep Manager and this free space is not corrupted.

  • Page 53: Hard Disk Standby Mode Conditions And Descriptions

    Table 1-39 Hard Disk Standby Mode Conditions and Descriptions Condition Description The condition to enter HDD Standby Display Standby Timer times-out or LCD cover is closed. Mode The condition of HDD Standby Mode All the system components are on except HDD spindle motor The condition back to On Mode Any access to HDD BATTERY LOW...

  • Page 54: Drivers, Applications And Utilities

    1.5.2 Drivers, Applications and Utilities The notebook comes preloaded with the following software: Windows 95 System utilities and application software Sleeper manager utility Touchpad driver Display drivers Audio drivers PC Card slot drivers and applications Other third-party application software Table 1-40 Location of Drivers in the System Utility CD Device Category Function...

  • Page 55: System Block Diagram

    System Block Diagram Figure 1-15 System Block Diagram System Introduction 1-37...

  • Page 56: Environmental Requirements

    Environmental Requirements Table 1-42 Environmental Requirements Item Specification Temperature Operating (ºC) +5 C ~ +35 C Non-operating(ºC) -20 C ~ +60 C Humidity Operating (non-condensing) 20% ~ 80% Non-operating (non-condensing) 20% ~ 80% Operating Vibration (unpacked) Operating 5 - 25.6Hz, 0.38mm; 25.6 - 250Hz, 0.5G Sweep rate >...

  • Page 57: Mechanical Specifications

    Mechanical Specifications Table 1-43 Mechanical Specifications Item Specification Weight (includes battery) FDD model 2.6 kg. (5.7 lb.) CD-ROM model 2.8 kg. (6.2 lb.) Dimensions W x D x H (main footprint) 306mm x 228mm x 46mm (12.05” x 8.98” x 1.81”) System Introduction 1-39...

  • Page 58: Chapter 2 Major Chips Description

    Major Chips Description This chapter discusses the major chips used in the notebook. Major Component List Table 2-1 Major Chips List Component Vendor Description M1521 Acer System data buffer M1523 Acer System controller chip M7101 Acer Power management unit 65550 C&T (Chips &...

  • Page 59: Ali M1521

    ALI M1521 The ALADDIN-III consists of two chips, ALI M1521 and M1523 to give a 586 class system the complete solution with most up-to-date feature architecture multimedia/multithreading operating system. It utilizes the BGA package to improve the AC characterization, resolves system bottleneck and make the system manufacturing easier. The ALADDIN-III gives a highly-integrated system solution and a most up-to-date system architecture including the UMA, ECC, PBSRAM, SDRAM/BEDO, and multi-bus with highly efficient, deep FIFO between the buses, such as the HOST/PCI/ISA dedicated IDE bus.
  • Page 60 UMA (unified memory architecture) Dedicated UMA arbiter pins Supports several protocols from major graphics vendors SFB size : 512KB/1MB/2MB/3MB/4MB CPU could access frame buffer memory through system memory controller Alias address for frame buffer memory Fully synchronous 25/30/33 MHz 5V PCI interface PCI bus arbiter: five PCI masters and M1523 supported Dwords for CPU-to-PCI Memory write posted buffers Convert back-to-back CPU to PCI memory write to PCI burst cycle...

  • Page 61: System Block Diagram

    2.2.2 Block Diagram CPU Bus DRAM M1521 SRAM Graphic controller PCI Bus IDE Master M1523 USB connector ISA Bus Aladdin III System Block Diagram Figure 2-1 Alladin III Block Diagram Service Guide...

  • Page 62: Alladin Iii System Architecture

    2.2.3 System Architecture ALADDIN-III SYSTEM ARCHITECTURE 586 CPU data addr SRAM M1521 DRAM CTLR tag 8/11-bit 328-BGA M1523 IDE bus 208-PQFP/RTC/KBC USB conn 128K/256K XD - TTL Flash Figure 2-2 Alladin III System Architecture Major Chips Description...

  • Page 63: M1521 Data Path

    2.2.4 Data Path M U X M D _ I N 72-bit E C C MDIN[63:0] 64-bit H D _ MD_IN[63:0] O U T S W A P PCI_IN ECC partial 64-bit W-R path E C C S W A P 72-bit 8 Q W O R D M D _ O U T...

  • Page 64: M1521 Pin Diagram

    2.2.5 Pin Diagram Figure 2-4 M1521 Pin Diagram Major Chips Description...

  • Page 65: M1521 Signal Descriptions

    2.2.6 Signal Descriptions Table 2-2 M1521 Signal Descriptions Signal Type Description Host Interface A[31:29] W8, W11, U11, Y10, Host Address Bus Lines. A[31:3] have two A[28:26] Y9, V10, W9, W10, U9, functions. As inputs, along with the byte enable A[25:23] U10, V9, U5, V5, W5, signals, these serve as the address lines of the host A[22:20]...
  • Page 66 Table 2-2 M1521 Signal Descriptions (continued) Signal Type Description Host Interface M/IOJ Host Memory or I/O. This bus definition pin indicates the current bus cycle is either memory or input/ output. D/CJ Host Data or Code. This bus definition pin is used to distinguish data access cycles from code access cycles.
  • Page 67 Table 2-2 M1521 Signal Descriptions (continued) Signal Type Description DRAM Interface RASJ[6] / Row Address Strobe 6, or Synchronous DRAM CAS SCASJ[0] 0 (FPM/EDO/BEDO) of DRAM bank 6. SDRAM column address strobe (SDRAM) copy 0. RASJ[5:0] / N17, M17, E16, F16, Row Address Strobes or synchronous DRAM chip SCSJ[5:0] F17, G17...
  • Page 68 Table 2-2 M1521 Signal Descriptions (continued) Signal Type Description Secondary Cache Interface CCSJ/CB4 Synchronous SRAM chip select or Cache Address line 4 copy. This pin has two modes of operation depending on the type of SRAM selected via hardware strapping options or programming the CC register.
  • Page 69 Table 2-2 M1521 Signal Descriptions (continued) Signal Type Description TRDYJ Target Ready. This indicates the target is ready to complete the current data phase of transaction. STOPJ Stop. This indicates the target is requesting the master to stop the current transaction. LOCKJ Lock Resource Signal.
  • Page 70 Table 2-2 M1521 Signal Descriptions (continued) Signal Type Description UMA Interface MGNTJ/ Memory Grant. This output connects to the MGNTJ GNTJ[4] of the GUI device. This pin can also be used as grant signal of the fifth PCI master. PRIO Priority.

  • Page 71: Ali M1523

    ALI M1523 The M1523 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1523 has Integrated System Peripherals (ISP) on-chip and provides advanced features in the DMA controller. This chip contains the keyboard controller, real-time clock and IDE master controller.
  • Page 72 32-bit addressability Provides compatible DMA transfers Provides type F transfers Interrupt controller Provides 14 interrupt channels Independently programmable level/edge triggered channels Counter/Timers Provides 8254 compatible timers for system timer, refresh request, speaker output use Keyboard controller Built-in PS2/AT keyboard controller The specific I/O is used to save the external TTL buffer Real time clock Built-in real-time clock...

  • Page 73: M1523 Block Diagram

    2.3.2 Block Diagram M 1 5 2 3 Blo c k Diagram SD[15:8] XD[7:0] SA[19:0] CPURST SBHEJ RSTDRV LA[23:17] Clock & Reset OSC14M DATA IO16J PCICLK M16J Buffer CBEJ[3:0] PCI BUS MEMRJ AD[31:0] Control ISA BUS MEMWJ Interface FRAMEJ Interface UNIT TRDYJ IOCHRDYJ...

  • Page 74: M1523 Pin Diagram

    2.3.3 Pin Diagram BALE IRQ12 MSCLK KBDATA KBCLK/KBCSJ SBHEJ KBINH/IRQ1 M16J IDESCS3J LA23 IDESCS1J IO16J IDEPCS3J LA22 IDEPCS1J IRQ10 IDE_A0 LA21 IDE_A2 IRQ11 IDE_A1 VDD/BAT IDAKJ1 RTC32KII IDAKJ0 RTC32KI IDERDY IDEIORJ LA20 IDEIOWJ LA19 IDRQ1 IRQ15 IDRQ0 LA18 M1523 IDE_D0 IRQ14 IDE_D15 LA17...

  • Page 75: M1523 Signal Descriptions

    2.3.4 Signal Descriptions Table 2-3 M1523 Signal Descriptions Signal Type Description Clock and Reset Power-Good Input. This signal comes from the power supply to indicate that power is available and stable. CPURST CPU Reset includes cold and warm reset 3.3V signal (connected to CPU INIT) RSTDRV CPU Cold Reset.
  • Page 76 Table 2-3 M1523 Signal Descriptions (continued) Signal Type Description PCI Interrupt Unit INTAJ_MI PCI Interrupt Input A or PCI interrupt polling input. INTBJ PCI Interrupt Input B or polling select_0 output. INTCJ PCI Interrupt Input C or polling select_1 output. INTDJ PCI Interrupt Input D or polling select_2 output.
  • Page 77 Table 2-3 M1523 Signal Descriptions (continued) Signal Type Description ISA Interface SA[16:0] 181, 185, 187, ISA Slot Address Bus. These lines are addresses 188, 190, 192, connected to slot address. 193, 195, 197, 199, 201, 203, 205, 207, 3, 4, SBHEJ ISA Slot Byte-high Enable.
  • Page 78 Table 2-3 M1523 Signal Descriptions (continued) Signal Type Description ISA Interface SMEMRJ / LMEGJ ISA System Memory Read. When the internal RTC is enabled, this signal indicates that the memory read cycle is for an address below 1-MB address. Otherwise, this pin only indicates an address below 1M byte.
  • Page 79 Table 2-3 M1523 Signal Descriptions (continued) Signal Type Description Miscellaneous MSCLK Mouse Clock Output when the internal KBC is enabled. RTC32KI RTC 32.768K Osc1. This is crystal input and requires an external 32.768khz quartz crystal. RTC32KII RTC 32.768K Osc2. This is crystal input and requires an external 32.768khz quartz crystal.
  • Page 80 Table 2-3 M1523 Signal Descriptions (continued) Signal Type Description IDE Interface IDE_D[15:0] 135, 132, 130, IDE ATA Data Bus 128, 126, 124, 122, 119, 121, 123, 125, 127, 129, 131, 133, Vcc and Vss VCC3 Vcc 3.3V VCC5/V RTC Battery Input VCC5 40, 72, 105, VCC 5.0V(VDD)

  • Page 81: Features

    ALI M7101 (Power Management Unit) 2.4.1 Features Four operating states - ON, DOZE, SLEEP, APM Programmable DOZE and SLEEP timer Programmable EL timer for backlight control Two Programmable APM timers Two output pins depending on operating state, each pin is programmable and power configurable Provides system activity and EL activity monitorings, includes Video...

  • Page 82: M7101 Pin Diagram

    2.4.2 Pin Diagram GPIOC3 GPIOC2 AD23 GPIOC1 AD22 GPIOC0 AD21 GPIOA7 AD20 GPIOA6 AD19 GPIOA5 AD18 GPIOA4 AD17 GPIOA3 AD16 GPIOA2 CBEJ2 GPIOA1 VDD5 M7101 GPIOA0 FRAMEJ IRDYJ CLK32 TRDYJ SEL1 DEVSELJ SEL0 VDD5 CBEJ1 DISPLAY SMIJ CCFT FPVEE AD15 SPKCTL AD14 SQWO...

  • Page 83: M7101 Pin Descriptions

    2.4.3 Pin Description Table 2-4 M7101 Pin Descriptions Name Type Description PCI interface : (42) PCICLK PCI Clock. This is the PCI Bus interface CLK input signal. This clock frequency should not be more than 33 Mhz. It is used by internal PCI interface.
  • Page 84 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description PMU Input event interface : (11) Low Battery. First stage battery low indication. If low is detected and Low Battery Timer is timeout, then battery low 1 SMIJ will be generated every programmed interval time until battery low 2 SMIJ is asserted or LB timer is reset.
  • Page 85 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description PMU Input event interface : (11) External PS2 MOUSE. This signal represents whether the PS2 MOUSE is plugged in or not. When a PS2 MOUSE is plugged in, a high to low transition will generate a SMIJ. When a PS2 MOUSE is pulled out, a low to high transition will generate a SMIJ as well.
  • Page 86 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description PMU output interface (9) CCFT Backlight control. This signal is used to turn on/off LCD backlight. FPVEE will AND with offset 0D2h D0 to generate CCFT. That is, if both FPVEE and offset 0D2h D0 are high then CCFT will be high or 1Khz signal with programmed duty cycle by offset 0Fbh D[4:0].
  • Page 87 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA6 (70) Speak input. When offset 0F6h D6=‘1’, this pin will be speaker input. The input signal will xor with SPKCTL internally. /SPEKIN GPIOA5 (69)
  • Page 88 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA0 (64) External General Purpose I/O A read. When SPKCTL is pull low 4.7K, the GPIOA0 will become GPIORAJ. External General /GPIORAJ purpose A Read control pulse, When Read index 0E1h with a byte or a word.
  • Page 89 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description General purpose I/O interface(24) General purpose I/O group B GPIOB3 (84) BRDYJ Input. When DISPLAY is pulled low, this pin will be BRDYJ input. It must be connected to CPU. /IN_BRDYJ GPIOB2 (83) INIT Input.
  • Page 90 Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description General purpose I/O interface(24) General purpose I/O group C GPIOC5 (78) External suspend/resume switch. When offset 0F6h D10=0, this signal is GPIOC5. When D10=1, this signal will become EXTSW. /EXTSW External Suspend/Resume switch input. Pressing this switch will generate SMIJ to suspend or resume the system.

  • Page 91: M7101 Different Pin Definition Setting

    Table 2-4 M7101 Pin Descriptions (Continued) Name Type Description Power Pins VDD5 x 3 11,59,76 5V VDD input VDD3 x 2 26,100 3.3V VDD input VDDS x 1 5V Suspend VDD input. This pin supplies to RI, RTC, HOTKEYJ, COVSW, SUSTATE, PWGD, SUSRSTJ pad. VSS x 5 1,19,38, VSS Ground.

  • Page 92: M7101 Original Pin Definition Setting

    When offset 0F6h, D5=1 and offset 0FBh, D7=1; GPIOB[7:0] and GPIOA[7:0] output some clocks for testing. The clocks are OTCOUNT, O16K, TCLK2, TCLK3, O128HZ, O16HZ, O8HZ, O4HZ, O2HZ, O1Hz, ELCOUNT, DZCOUNT, SLCOUNT, RICOUNT, LBCOUNT[1:0]. Table 2-6 M7101 Original Pin Definition Setting Original D6=1 D7=1...

  • Page 93: M7101 Numerical Pin List

    2.4.5 Numerical Pin List Table 2-7 M7101 Numerical Pin List Pin Name Type Pin Name Type AD23 AD22 SLED AD21 SQWO AD20 SPKCTL AD19 FPVEE AD18 CCFT AD17 DISPLAY AD16 VDD5 CBEJ2 SEL0 VDD5 SEL1 FRAMEJ CLK32 IRDYJ TRDYJ GPIOA0 DEVSELJ GPIOA1 GPIOA2...

  • Page 94: M7101 Alphabetical Pin List

    2.4.6 Alphabetical Pin List Table 2-8 M7101 Alphabetical Pin List Pin Name Type Pin Name Type ACPWR GPIOA4 GPIOA5 GPIOA6 GPIOA7 GPIOB0 GPIOB1 GPIOB2 GPIOB3 GPIOB6 GPIOB4 GPIOB5 AD10 GPIOB7 AD11 GPIOC0 AD12 GPIOC1 AD13 GPIOC2 AD14 GPIOC3 AD15 GPIOC4 AD16 GPIOC5 AD17...

  • Page 95: Function Description

    2.4.7 Function Description The function blocks of M7101 are as follows : 1. PCI Interface 2. State Controller 3. Timer 4. Wake up event handler 5. Activity monitor 6. Battery monitor 7. General Purpose Input/Output (GPIO) 8. SMIJ Generator 9. SUSPEND monitor 10.

  • Page 96: State Machine For Pci Interface

    Table 2-9 M7101 PCI Interface Lock Register Action I/O Port I/O Port 017Ah/007Ah 0178h/0078h Lock Read not available not available except offset 0D1h except offset 0D1h Lock Write not available not available except offset 0D1h except offset 0D1h Unlock available available Read Unlock...

  • Page 97: C&T 65550 High Performance Flat Panel/Crt Vga Controller

    2.5 C&T 65550 High Performance Flat Panel/CRT VGA Controller The C&T65550 of high performance multimedia flat panel / CRT GUI accelerators extend CHIPS’ offering of high performance flat panel controllers for full-featured note books and sub-notebooks. The C&T65550 offers 64-bit high performance and new hardware multimedia support features. 2.5.1 Features HIGH PERFORMANCE...

  • Page 98: C&T 65550 Block Diagram

    The C&T65550 offers a variety of programmable features to optimize display quality. Vertical centering and stretching are provided for handling modes with less than 480 lines on 480-line panels. Horizontal and vertical stretching capabilities are also available for both text and graphics modes for optimal display of VGA text and graphics modes on 800x600 and 1024x768 panels.

  • Page 99: C&T 65550 Pin Diagram

    2.5.3 Pin Diagram Figure 2-10 C&T 65550 Pin Diagram 2-42 Service Guide...

  • Page 100: C&T 65550 Pin Descriptions

    2.5.4 Pin Descriptions Table 2-10 C&T 65550 Pin Descriptions Pin# Pin Name Type Description CPU Direct / VL-Bus Interface RESET Reset. For VL-Bus interfaces, connect to RESET#. For direct CPU local bus interfaces, connect to the system reset generated by the mother board system logic for all peripherals (not the RESET# pin of the processor).
  • Page 101 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) BE0# (BLE#) Byte Enable 0. Indicates data transfer on D7:D0 for the current cycle. BE1# Byte Enable 1. Indicates data transfer on D15:D8 for the current cycle.
  • Page 102 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) System Data Bus. In 32-bit CPU Local Bus designs these data lines connect directly to the processor data lines. On the VL-Bus they connect to the corresponding buffered or unbuffered data signal.
  • Page 103 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) Parity. This signal is used to maintain even parity across AD0-31 and C/BE0-3#. PAR is stable and valid one clock after the address phase. For data phases, PAR is stable and valid one clock after either IRDY# is asserted on a write transaction or TRDY# is asserted on a read transaction.
  • Page 104 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) SERR# (MCLKOUT) System Error. Used to report system errors where the result will be catastrophic (address parity error, data parity errors for Special Cycle commands, etc.). This output is actively driven for a single PCI clock cycle synchronous to CLK and meets the same setup and hold time requirements as all other bused signals.
  • Page 105 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) AD00 PCI Address / Data Bus. Address and data are multiplexed AD01 on the same pins. A bus transaction consists of an address AD02 phase followed by one or more data phases (both read and AD03 write bursts are allowed by the bus definition).
  • Page 106 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) C/BE0# Bus Command / Byte Enables. During the address phase. of C/BE1# a bus transaction, these pins define the bus command see C/BE2# list below: C/BE3# C/BE3-0 Command Type...
  • Page 107 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) CA0 (P16) Address bus for DRAM C. CA1 (P17) CA0-7 may be configured as flat panel data output (P16-23). CA2 (P18) See also pins 71-88 (in Flat Panel Display interface pin CA3 (P19) descriptions section).
  • Page 108 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Display Memory Interface MAD0 Memory data bus for DRAM A. (lower 512KB of display MAD1 memory) MAD2 (CFG10) MAD2-7 are latched into XR71 register on reset for use as MAD3 (CFG11) additional configuration inputs (CFG10-12 are reserved by MAD4 (CFG12)
  • Page 109 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface 8, 9, 12, or 16-bit flat panel data output. 18-bit and 24-bit panel interfaces may also be supported (see CA0-7 for P16- 23). Refer to Table 2-7 for the configurations for various panel types.
  • Page 110 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface (continued) RSET Set point resistor for the internal color palette DAC. A 560 1% resistor is required between RSET and AGND. AVCC Analog power and ground pins for noise isolation for the AGND internal color palette DAC.

  • Page 111: Flat Panel Display Interface Configurations

    Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Power / Ground and Standby Control (continued) Power / Ground (Bus Interface) 5V 10% or 3.3V 0.3V. DGND DGND MVCCA Power / Ground (Bus Interface) 5V 10% or 3.3V 0.3V. MGNDA MVCCB MGNDB...

  • Page 112: Bus Output Signal Status During Standby Mode

    BUS OUTPUT SIGNAL STATUS DURING STANDBY MODE Table 2-12 Bus Output Signal Status During Standby Mode 65550 Pin# Signal Name Signal Status ACTI / A26 Driven Low EBABKL / A27 Driven Low LRDY# / RDY Tri-Stated LDEV# Tri-Stated 51-44, 41-40, 38-33 D0-15 Tri-Stated 20-13, 8-1...

  • Page 113: Overview

    TI PCI1131 CardBus Controller 2.6.1 Overview The PCI1131 is a bridge between the PCI local bus and two PC Card sockets supporting both 16- bit and 32-bit CardBus PC Cards, and is compliant with the PCI Local Bus Specification Revision 2.1 and PCMCIA's 1995 PCI Card Standard.

  • Page 114: Architecture

    2.6.2 Architecture The Texas Instruments PCI1131 is a high-performance PCI-to-PC Card controller that supports two independent PC Card sockets compliant with the1995 PC Card Standard. The PCI1131 provides a rich set of features which make it the best choice for bridging between PCI and PC Cards in both notebook and desktop computers.
  • Page 115 Packaged in a 208-pin TQFP Multi-function PCI Device with Separate Configuration Spaces for each Socket Five PCI Memory Windows and Two l/O Windows Available to each PC Card16 Socket Two l/O Windows and Two Memory Windows Available to each CardBus socket CardBus Memory Windows can be Individually selected prefetchable or non-prefetchable ExCA™-Compatible Registers Are Mapped in Memory andfilO Space Texas Instruments (TI™) Extension Registers Mapped in the PCI Configuration Space...

  • Page 116: Functional Block Diagram - 16-Bit Pc Card Interface

    2.6.4 Block Diagram Figure 2-11 Functional Block Diagram - 16-bit PC Card Interface Major Chips Description 2-59...

  • Page 117: Functional Block Diagram - Cardbus Card Interface

    Figure 2-12 Functional block diagram - CardBus Card Interface 2-60 Service Guide...

  • Page 118: Pci-To-Pc Card (16-Bit) Terminal Assignments

    2.6.5 Pin Diagram Figure 2-13 PCI-to-PC Card (16-bit) terminal assignments Major Chips Description 2-61...

  • Page 119: Pci-To-Cardbus Terminal Assignments

    Figure 2-14 PCI-to-CardBus terminal assignments 2-62 Service Guide...

  • Page 120: Terminal Functions

    2.6.6 Terminal Functions Table 2-13 PCI1131 Pin Descriptions TERMINAL FUNCTION NAME TYPE PCI System Terminals PCLK PCI Bus clock. The PCI bus clock provides timing for all transactions on the PCI bus. All PCI signals are sampled at the rising edge of PCLK. RSTIN PCI Reset.
  • Page 121 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION NAME TYPE PCI Address and Data Terminals C/BE3 180 8us commands and byte enables. These are muitiplexed on the same PCI terminals. During the address phase, C/BE-0 define the bus C/BE2 192 command.
  • Page 122 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION NAME TYPE PCI Interface Control Terminals TRDY 196 Target ready. Indicates the PCI 1131 ability to complete the current data phase of the transaction. TRDY is used in conjunction with IRDY. A data phase is completed on any clock where both TRDY I/O are sampled asserted.
  • Page 123 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot 1 6-bit PC Card Address and Data (Slots A and B) PC Card Data. 16-bit PC Card data lines. D15 is the most significant bit. 1 6-bit PC Card Interface Control Signals (Slots A and B) PC Card Detect 1 and Card Detect 2.
  • Page 124 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot 1 6-bit PC Card Interface Control Signals (Slots A and B) BVD2 Battery Voltage Detect 2. Generated by 16-bit memory PC Cards that include batteries. BVD2 is used with BVD 1 as an indication of the condition of the batteries on a memory PC Card.
  • Page 125 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot 1 6-bit PC Card Address and Data (Slots A and B) IORD I/O Read. LORD is asserted by the PCI1131 to enable 16-bit l/O PC Card data output during host I/O read cycles. (DMA Write) This pin is used as the DMA write strobe during DMA operations from a 16-bit PC Card which supports DMA.
  • Page 126 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot 1 6-bit PC Card Interface Control Signals (Slots A and B) Write Protect. This signal applies to 16-bit Memory PC Cards. WP reflects the status of the write-protect switch on 16-bitmemory PC Cards. (IOIS16) For 16-bit l/O cards, WP is used for the 16-bit port ( IOIS16) function.
  • Page 127 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot CardBus PC Card Address and Data Signals (Slots A and B) CC/BE0 94 CardBus PC Card Command and Byte Enables. These signals are multiplexed on the same pin. During the address phase of the CC/BE1 104 transaction, CC/BE3 0 define the bus command.
  • Page 128 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot CardBus PC Card Interface Control Signals (Slots A and B) CBLOCK 107 42 CardBus Lock. This is an optional signal used to lock a particular address, ensuring a bus initiator exclusive access. NOTE: This signal is not supported on the PCI 1131.
  • Page 129 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL FUNCTION Name Slot TYPE Slot CardBus PC Card Interface Control Signals (Slots A and B) CREQ CardBus Request. This signal ir1dicates to the arbiter that the CardBus PC Card desires use the CardBus bus. CGNT CardBus Grant.
  • Page 130 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL I /O TYPE FUNCTION NAME Interrupt Terminals IRQ3/INTA Interrupt Request 3 and Interrupt Request 4. These terminals may be connected to either PCI or ISA interrupts. These IRQ4/INTB terminals are software configurable as IRQ3 or T1VTA, and as IRQ4 or T1~.
  • Page 131 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL I /O FUNCTION NAME TYPE Interrupt Terminals IRQ15/ Interrupt Request 15. This terminal indicates an interrupt request RI_OUT from one of the PC Cards. RI_OUT allows the RI input from the 1 6- bit PC Card, CSTSCHG from CardBus Cards or PC Card removal events to be output to the system.

  • Page 132: Ns87336Vjg Super I/O Controller

    NS87336VJG Super I/O Controller The PC87336VJG is a single chip solution for most commonly used I/O peripherals in ISA, and EISA based computers. It incorporates a Floppy Disk Controller(FDC), two full featured UARTs, and an IEEE 1284 compatible parallel port Standard PC-AT address decoding for all the peripherals and a set of configuration registers are also implemented in this highly integrated member of the Super l/O family.
  • Page 133 The Bidirectional Parallel Port: Enhanced Parallel Port(EPP) compatible Extended Capabilities Port(ECP) compatible, including level 2 support Bidirectional under either software or hardware control Compatible with ISA, and EISA, architectures Ability to multiplex FDC signals on parallel port pins allows use of an external Floppy Disk Drive(FDD) Includes protection circuit to prevent damage to the parallel port when a connected printer is powered up or is operated at a higher voltage...

  • Page 134: Ns87336Vjg Block Diagram

    Plug and Play Compatible: 16 bit addressing(full programmable) 10 selectable IRQs 3 selectable DMA Channels 3 SIRQ Inputs allows external devices to mapping IRQs 100-Pin TQFP package - PC87336VJG 2.7.2 Block Diagram Config. Serial Serial Interrupt Interrupt Inputs Interface Interface Interface UART Configuration...

  • Page 135: Ns87336Vjg Pin Diagram

    2.7.3 Pin Diagram Figure 2-16 NS87336VJG Pin Diagram 2-78 Service Guide...

  • Page 136: Ns87336Vjg Pin Descriptions

    2.7.4 Pin Description Table 2-14 NS87336VJG Pin Descriptions Description A15-A0 67, 64, Address. These address lines from the microprocessor determine which 62-60, internal register is accessed. A0-A15 are don't cares during DMA 29, 19- transfer. /ACK Parallel Port Acknowledge. This input is pulsed low by the printer to indicate that it has received the data from the parallel port.
  • Page 137 Table 2-14 NS87336VJG Pin Descriptions (continued) Description /CS0, 51, 3 Programmable Chip Select. /CS0, 1 are programmable chip select /CS1 and/or latch enable and/or output enable signals that can be used as game port, I/O expand, etc. The decoded address and the assertion conditions are configured via the 87336VJG’s configuration registers.
  • Page 138 Table 2-14 NS87336VJG Pin Descriptions (continued) Description DENSEL FDC Density Select. DENSEL indicates that a high FDC density data (Normal Mode) rate (500 Kbs, 1 Mbs or 2 Mbs) or a low density data rate (250 or 300 Kbs) is selected. DENSEL is active high for high density (5.25-inch drives) when IDENT is high, and active low for high density (3.5-inch drives) when IDENT is low.
  • Page 139 Table 2-14 NS87336VJG Pin Descriptions (continued) Description /DRV2 FDD Drive2. This input indicates whether a second disk drive has been installed. The state of this pin is available from Status Register A in PS/2 mode. (See PNF for further information). /DSKCHG Disk Change.
  • Page 140 Table 2-14 NS87336VJG Pin Descriptions (continued) Description IORCHDY I/O Channel Ready. When IORCHDY is driven low, the EPP extends the host cycle. IRQ3, 4 99, 98 Interrupt 3, 4, 5, 6, 7, 9, 10, 11, 12, and 15. This pin can be a totem- IRQ5-7 96-94, pole output or an open-drain output.
  • Page 141 Table 2-14 NS87336VJG Pin Descriptions (continued) Description /MSEN0 50, 49 Media Sense. These pins are Media Sense input pins when bit 0 of /MSEN1 FCR is 0. Each pin has a 10 K internal pull-up resistor. When bit 0 (Normal Mode) of FCR is 1, these pins are Data Rate output pins and the pull-up resistors are disabled.
  • Page 142 Table 2-14 NS87336VJG Pin Descriptions (continued) Description /RI1 68, 60 UARTs Ring Indicator. When low, this indicates that a telephone ring /RI2 signal has been received by the modem. The /RI signal is a modem status input whose condition is tested by the CPU by reading bit 6 (RI) of the Modem Status Register (MSR) for the appropriate serial channel.
  • Page 143 Table 2-14 NS87336VJG Pin Descriptions (continued) Description Terminal Count. Control signal from the DMA controller to indicate the termination of a DMA transfer. TC is accepted only when FDACK is active. TC is active high in PC-AT and Model 30 modes, and active low in PS/2 mode.

  • Page 144: Yamaha Ymf715 Audio Chip

    Yamaha YMF715 Audio Chip YMF715-S (OPL3-SA3) is a single audio chip that integrates OPL3 and its DAC, 16 bit Sigma- delta CODEC, MPU401 MIDI interface, joystick with timer, and a 3D enhanced controller including all the analog components which is suitable for multi-media application. This LSI is fully compliant with Plug and Play ISA 1.0a, and supports all the necessary features, i.e.

  • Page 145: Ymf715 Block Diagram

    2.8.2 Pin Diagram Figure 2-17 YMF715 Block Diagram 2-88 Service Guide...

  • Page 146: Ymf715 Descriptions

    2.8.3 Pin Descriptions Table 2-15 YMF715 Descriptions Pin name Pins Type Size Function ISA bus interface: 36 pins D7-0 24mA Data Bus Al 1-0 Address Bus Address Bus Enable /IOW Schmitt Write Enable /IOR Schmitt Read Enable RESET Schmitt Reset IRQ3,5,7,9,10,11 12mA Interrupt request...
  • Page 147 Table 2-15 YMF715 Descriptions (Continued) Pin name Pins Type Size Function Multi-purpose Dins: 13 pins SEL2-0 CMOS Refer to “Multi-purpose pins” section MP9-0 I+/O Refer to “multi-purpose pins” section Others: 27 pins GPO - GP3 Game Port GP4- GP7 Schmitt Game Port Schmitt 2rnA...

  • Page 148: T62.062.C Battery Charger

    T62.062.C Battery Charger 2.9.1 Overview Ambit T62.062.C.00 charger is designed exclusively for TI Extensa 610 notebook computer as a power management and battery charger module which can charge a 9 cells Nickel-Metal Hydride (NiMH) or 9 cells with 3’s parallel and 3’s serial Lithium Ion(LIB) Battery pack. When charging the NiMH battery , the determination of the battery full capacity for the charger is based on zero delta Voltage (0 V), temperature increment gradient (T/t), minus delta voltage (-V) and maximum voltage (Max.

  • Page 149: Absolute Maximum Ratings

    Max. T Safety charging timer Battery temperature constantly monitoring Over voltage protect 13V Providing low battery warning signals when the system using battery as the main power source 2.9.3 Absolute Maximum Ratings Table 2-16 T62.062.C Absolute Maximum Ratings Table Parameter Maximum Ratings Supply voltage ( Adapter) 0V to +24V...
  • Page 150 Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition UNITS OUTPUT AC Source input Signal AD5V AC source voltage > 5.25 (Voltage) (Supply current) Battery in use (High) BAT-IN-USE# @I load=100uA 5.25 (Low) (Supply current) Power Output DCBAT OUT Charge Indicator BT-QCHG Quick...

  • Page 151: T62.062.C Pin Diagram

    Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition UNITS SAFETY OPERATION Over voltage NiMH 16.2 protect by Software LiB_lon Note 1: External Adapter: Voltage limit 20V1V with maximum 24V over voltage as well as over current protection. 2.9.5 Pin Diagram DC_BAT_OUT DC_BAT_OUT...

  • Page 152: T62.062.C Pin Description Table

    2.9.6 Pin Description Table 2-18 T62.062.C Pin Description table Item Pin Name Description SAFETY OPERATION DC_BAT_OUT .adapter power input and battery power output terminal( with 5 A short circuit protection) DC_BAT_OUT same as pin 1 DC_BAT_OUT same as pin 1 DC_BAT_OUT same as pin 1 ground...

  • Page 153: Functions Description

    2.9.7 Functions Description 2.9.7.1 Charge Function A. FOR NIMH BATTERY When the charger module charges a 9 cells NiMH battery, 0V and T/ t, max T and - v detentions will be used as the main methods to determine the full charged battery. To ensure safety for the battery and system, fast charging NiMH battery after long period of storage time, the module will disable 0V detection during a short “...

  • Page 154: Safety Concerns

    When system on if Adapter not inserted and battery voltage lower than BL3 voltage , then system will be turned off by the charger module. In addition, when system sends a ‘disable’ signal to charger module, system will be turned off by the charger module immedietly.

  • Page 155: T62.061.C Dc-Dc Converter

    2.10 T62.061.C DC-DC Converter This compact, high efficiency DC/DC Converter features +5V, +3.3V, 2.35V/2.45V/2.9V/3.1V, +12V and +6V five outputs up to 22 watts. And it accepts input from 7V to 21V, suitable for 3 cells Lithium Ion or 10 cells NiMH battery input Pentium based Notebook PC. The converter also supplies P.G.

  • Page 156: Specifications

    2.10.3 Specifications Input: DC BATT_IN:7V-8V DC Output: :Load :0~2A +12V :Load :0~0.12A The other conditions same as 2.2.1 Input: DCBATT_IN :8V-21V Output: +5V: Load : 0A-3.2A Regulation: +5%, -5% Ripple: 50mV (max) Noise: 100mV (max) OVP: 6.5-8.2V Short-circuit protection Fuse protection *Ripple(max)=75mV when regulate in IDLE mode +3.3V: Load : 0A-3.3A Regulation: +5%, -5%...

  • Page 157: Control

    +2.35V:(2.45V) Load : 0A-4.2A Regulation: +5%, -4% Ripple: 50mA (max) Noise: 100mV (max) OVP: 3.3-5.0V Short-circuit protection Fuse protection *Ripple(max)=75mV when regulate in IDLE mode +12V : Load : 0A-0.15A Regulation: +/-5% Ripple: 100mV (max) Noise: 200mV (max) OVP: 14-20V *The +12V max load condition is available only when the +5V output load is greater than 0.5A.
  • Page 158 Output filter capacitor The recommended value is 30uF/Amps TAN or OS-CON CAP. Efficiency: 90%(MIN) at 12V input and 5V/1.5A , 3.3V/0.8A , 2.9V/0.6A load. Environment: Operating Temperature: 0 to 65 Relative Humidity: 10% to 95% Shipping/Storage Temperature: 25 to 85 Relative Humidity: 10% to 95% Major Chips Description...

  • Page 159: Maximum Ratings

    2.11 T62.064.C DC-AC Inverter (11.3") THIS IS A DC-AC INVERTER UNIT TO DRIVE BACKLIGHT CCFT FOR NOTEBOOK COMPUTERS Table 2-20 MAXIMUM RATINGS ITEM SYMBOL UNIT REMARK INPUT VOLTAGE INPUT CURRENT 2.11.1 Electrical Specifications Electrical Characteristics Table 2-21 Electrical Characteristics ITEM SYMBOL UNIT REMARK...

  • Page 160: Pin & Connector Assignment

    Operation Conditions OPERATING TEMPERATURE 0 TO +50 OPERATING HUMIDITY 90% MAX. R.H STORAGE TEMPERATURE 10 TO +85 STORAGE HUMIDITY 90% MAX. R.H MTBF 50000 HRS 2.11.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-22 Pin Description PIN NO. SYMBOL DESCRIPRION DCBATTIN DC (7.0V ~ 21.0V)

  • Page 161: Top Overlay

    2.11.3 Top Overlay Figure 2-20 T62.064.C DC-AC Inverter Top Overlay diagram 2.11.4 Bottom Overlay Figure 2-21 T62.064.C DC-AC Inverter Bottom Overlay diagram 2-104 Service Guide...

  • Page 162: Maximum Ratings

    2.12 T62.066.C DC-AC Inverter (12.1") This is a DC-AC inverter unit to drive Backlight CCFT for notebook computers Table 2-23 MAXIMUM RATINGS ITEM SYMBOL UNIT REMARK INPUT VOLTAGE INPUT 0.65 CURRENT 2.12.1 Electrical Specifications Electrical Characteristics Table 2-24 Electrical Characteristics ITEM SYMBOL UNIT...

  • Page 163: J1: 52103-1217 (Molex) Pin Description

    2.12.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-25 J1: 52103-1217 (MOLEX) Pin Description PIN NO. SYMBOL DESCRIPRION DCBATTIN DC (7.0V ~ 21.0V) POWER GND CCFTON PWM SIGNAL FOR ON/OFF AND BRIGHTNESS CONTROL DATA ID X24C02 DATA +5.0V +5.0V SGND LOGIC GND FOR X24C02 N.C.

  • Page 164: Bottom Overlay

    2.12.3 Top Overlay Figure 2-22 T62.066.C DC-AC Inverter Top Overlay diagram 2.12.4 Bottom Overlay Figure 2-23 T62.066.C DC-AC Inverter Bottom Overlay diagram Major Chips Description 2-107...

  • Page 165: When To Use Setup

    C h a p t e r C h a p t e r BIOS Setup Information The notebook has a BIOS setup utility that allows you to configure the notebook and its hardware settings. This chapter tells how to use the Setup utility and describes each parameter item in the setup screens.

  • Page 166: Entering Setup

    Entering Setup Press during POST to enter Setup. The BIOS Utility main screen displays. Setup Utility Basic System Settings System Security Power Management Settings Load Setup Default Settings =Move Highlight Bar, =Select, Esc=Exit There are four main menu items: Basic System Settings System Security Power Management Settings Load Setup Default Settings...
  • Page 167 When you press Esc to exit the Setup utility, the following prompt appears: Do you want to save CMOS data? [Yes] [No] Select [Yes] to save the changes you made to the configuration values or [No] abandon the changes and retain the current values. BIOS Setup Information...

  • Page 168: Basic System Configuration

    Basic System Configuration Basic System Configuration has a one-page screen display illustrated below. Basic System Settings Date ----------------------- [Dec 06,1996] Time ----------------------- [10:00:00] Floppy Disk A -------------- [1.44 MB 3.5-inch] Floppy Disk B -------------- [ None Cylinder Head Sector Hard Disk (1160 MB) -------- [Auto] Large Hard Disk Capacity --- [Enabled] Memory Test ---------------- [Disabled] Boot Display --------------- [Auto]...

  • Page 169: Memory Test

    3.3.5 Memory Test The notebook can test main memory for errors when you turn it on. The default setting, [Disabled] , allows the notebook to bypass the memory test and speed up the self-test procedure. 3.3.6 Boot Display If you connect an external monitor, you can switch display between the LCD and the external display.

  • Page 170: System Security

    System Security System Security Disk Drive Control Floppy Disk Drive ------------- [Normal] Hard Disk Drive --------------- [Normal] System Boot Drive ------------- [Drive A Then C] CD-ROM Bootable --------------- [Disabled] On Board Communication Ports Serial Port 1 Base Address ---- [3F8h(IRQ 4)] Parallel Port Base Address ---- [378h(IRQ 7)] Parallel Port Operation Mode -- [Standard and Bidirectional] ECP DMA Channel -------------- [0]...

  • Page 171: Cd-Rom Bootable

    3.4.3 System Boot Drive Control This parameter determines which drive the notebook boots from when you turn it on. following table lists the three possible settings. Table 3-4 System Boot Drive Control Settings Setting Description Drive A Then C Notebook boots from floppy drive A. If there is no system disk in drive A, the (default) notebook boots from hard disk C.

  • Page 172: Serial Port 1 Base Address

    3.4.5 Serial Port 1 Base Address The serial port can accommodate a modem, serial mouse, serial printer, or other serial devices. The default setting for the serial port base address is 3F8h(IRQ 4) Other options include: 2F8h(IRQ 3) 3E8h(IRQ 4) 2E8h(IRQ 3) Disabled Make sure the serial port base address does not conflict with the address used by a PCMCIA card,...

  • Page 173: Passwords

    The default setting is [Standard and Bidirectional] If you set EPP as the parallel port operation mode, do not use 3BCh as the parallel port base address; otherwise, I/O conflicts may occur. ECP DMA Channel Set the ECP DMA Channel parameter if you set the Parallel Port Operation Mode to [Enhanced .

  • Page 174: Cardbus Support

    3.4.9 CardBus Support The notebook comes pre-installed with a Windows 95 version which has built-in support for CardBus. In this case, CardBus Support is not needed and set to [Disabled] . If in case you install an older version of Windows 95 which does not have built-in Cardbus driver support, you need to enable this parameter.

  • Page 175: Power Management Settings

    Power Management Settings Besides accessing this screen from POST (F2), you can also press Fn-F6 during runtime to access this section of Setup. Power Management Settings Power Management Mode ------------- [Enabled] Display Standby Timer ------------- [ 1] Minute(s) Hard Disk Standby Timer ----------- [ 1] Minute(s) System Sleep Timer ---------------- [ 3] Minute(s) System Sleep Mode ----------------- [Hibernation] System Resume Timer Mode ---------- [Disabled]...

  • Page 176: System Sleep Timer

    The valid values for this timer range from 1 to 15 minutes with default set at . Select [Off] to disable the timer. 3.5.4 System Sleep Timer This parameter enables you to set a timeout period for the notebook to enter either standby or hibernation mode.

  • Page 177: Battery-Low Warning Beep

    3.5.9 Battery-low Warning Beep This parameter allows you to enable or disable the warning beep generated by the notebook when a battery-low condition occurs. The default setting is [Enabled] 3.5.10 Sleep Upon Battery-low This parameter enables the notebook to enter standby or hibernation mode when a battery-low condition takes place.

  • Page 178: System Information Reference

    System Information Reference If you access Setup during runtime (Fn-F6), pressing PgDn after the Power Management Settings screen displays a summary of your notebook’s components and settings. System Information Reference CPU ID : Pentium Internal Cache : 16KB, Enabled CPU Clock : 133 MHz External Cache : 256KB, Enabled System DRAM : 16 MB Pointing Device : Detected...

  • Page 179: System Status Descriptions

    Table 3-6 System Status Descriptions Item Description CPU ID Shows the processor type CPU Clock Shows the processor speed System memory Shows the total system memory Video memory Shows the total video memory Floppy Disk A Shows the floppy drive A type Security Shows floppy drive A security setting Floppy Disk B...

  • Page 180: Load Setup Default Settings

    Load Setup Default Settings Selecting this option allows you to load all the default settings. The default settings are the values initially stored in CMOS RAM intended to provide high performance. If in the future, you change these settings, you can load the default settings again by selecting this option. When you select this option, the following prompt appears: Load Setup Default Settings Are you sure?

  • Page 181: Disassembly And Unit Replacement

    C h a p t a p t e r Disassembly and Unit Replacement This chapter contains step-by-step procedures on how to disassemble the notebook computer for maintenance and troubleshooting. To disassemble the computer, you need the following tools: Wrist grounding strap and conductive mat for preventing electrostatic discharge Flat-bladed screwdriver Phillips screwdriver Hexagonal screwdriver...

  • Page 182: General Information

    General Information 4.1.1 Before You Begin Before proceeding with the disassembly procedure, make sure that you do the following: Turn off the power to the system and all peripherals. Unplug the AC adapter and all power and signal cables from the system. Remove the battery pack from the notebook by (1) pressing the battery compartment cover release button, and sliding out the cover.

  • Page 183: Connector Types

    4.1.2 Connector Types There are two kinds of connectors on the main board: Connectors with no locks Unplug the cable by simply pulling out the cable from the connector. Connectors with locks You can use a plastic stick to lock and unlock connectors with locks. The cables used here are special FPC (flexible printed-circuit) cables, which are more delicate than normal plastic-enclosed cables.

  • Page 184: Disassembly Sequence Flowchart

    4.1.3 Disassembly Sequence The disassembly procedure described in this manual is divided into four major sections: Section 4.2: Replacing Memory Section 4.3: Removing the hard disk drive Section 4.4: Removing the keyboard Section 4.5: Disassembling the inside frame assembly Section 4.6: Disassembling the display The following table lists the components that need to be removed during servicing.
  • Page 185 Figure 4-3 Disassembly Sequence Flowchart Disassembly and Unit Replacement...

  • Page 186: Replacing Memory

    Replacing Memory Follow these steps to insert memory modules: Turn the computer over to access the base. Remove the screw from the memory expansion door and remove the door. The memory door screw is part of the memory door and does not separate from the memory door.

  • Page 187: Removing The Hard Disk Drive Bay Cover

    Replace the memory expansion door and screw in place. Sleep Manager must be run after installing additional memory for the computer to hibernate properly. If Sleep Manager is active, it will automatically adjust the hibernation file on your notebook. If you are using an operating system other than Windows 95 or DOS, you may need to re-partition your hard disk drive to allow for the additional memory.

  • Page 188: Removing The Hard Disk Drive

    You will see a tape handle attached to the hard disk drive. Pull out the hard disk drive using the tape handle. Be careful pulling the hard disk drive out. Make sure the connector of the hard disk drive transfer board doesn’t loosen while removing the hard disk drive.

  • Page 189: Removing The Keyboard

    Removing the Keyboard Follow these steps to remove the keyboard: Slide out (1) and pull up (2) the two display hinge covers on both sides of the notebook. Figure 4-8 Removing the Display Hinge Covers Unplug the keyboard connectors (CN1 and CN2) from the keyboard connection board. Set aside the keyboard.

  • Page 190: Disassembling The Inside Frame Assembly

    Disassembling the Inside Frame Assembly This section discusses how to disassemble the housing, and during its course, includes removing and replacing of certain major components like the internal drive (CD-ROM or floppy), CPU and the main board. Follow these steps: 4.5.1 Removing the Heat Sink Assembly Remove the four screws that secure the heat sink to the housing.

  • Page 191: Removing The Internal Drive

    4.5.2 Removing the Internal Drive Pull up and remove the FDD/CD module latches. Unplug the internal drive cable (CN14/CN17 for CD-ROM or CN14 for FDD). Pull out the internal drive and set it aside. Ensure the drive cables do not become hooked on the inside frame assembly when removing and reinstalling the drive.

  • Page 192: Replacing The Cpu

    4.5.3 Replacing the CPU The unique ZIF (zero insertion force) socket allows you to easily remove the CPU. Follow these steps to remove the CPU and install a replacement CPU. See figure below. Insert a flat-blade screwdriver into the opening at the left end of the socket (labeled OPEN) and push towards the other end of the socket.

  • Page 193: Unplugging The Display Cable

    4.5.4 Removing the Display Remove the two screws that secure the display cable to the motherboard. Then unplug the display cable. Figure 4-13 Unplugging the Display Cable Remove the four display hinge screws. Then detach the display from the main unit and set aside.

  • Page 194: Removing The Bottom Screws

    4.5.5 Detaching the Top Cover Screws found on the lower case secure the top cover with the lower. However, you may not need to remove all six screws. Follow the discussion below for details. If you only want to remove the top cover from the lower case, remove all screws except for the encircled ones in this figure below.

  • Page 195: Detaching The Top Cover From The Base Assembly

    Remove three screws near the display hinge screw holes and one screw near the PC card slots. Before you detached the top cover make sure that you unplug the cable for the CN19 (touch pad). Unsnap the top cover from the base assembly and set aside. Figure 4-16 Detaching the Top Cover from the Base Assembly Disassembly and Unit Replacement...

  • Page 196: Detaching The Base Assembly

    4.5.6 Removing the Base Assembly Remove four screws that secure the inside frame assembly to the base assembly. Then detach the inside frame assembly from the base assembly. Figure 4-17 Detaching the Base Assembly 4-16 Service Guide...

  • Page 197: Removing The Fan

    4.5.7 Removing the Motherboard Remove the fan by (3) removing the sticker and (4) unplugging the fan cable (CN9). Figure 4-18 Removing the Fan When installing the fan, the fan hole should face the rear of the unit to draw thermal air out of the system. Remove the audio board by (1) unplugging the audio board connector (CN5), and then (2) pulling up the audio board.

  • Page 198: Removing The Battery Connector Board

    Unplug the battery connector board cable (CN18). Figure 4-20 Removing the Battery Connector Board Unplug the (a) LCD cover switch cable (CN8) and (b) speaker cables (CN7 and CN10). CN10 Figure 4-21 Unplugging the LCD Cover Switch and Speaker Cables 4-18 Service Guide...

  • Page 199: Removing The Charger Board

    Turn the unit over and remove the two screws that secure the Charger Board to the inside of the assembly frame. Then remove the board. Figure 4-22 Removing the Charger Board Remove seven screws that secure the motherboard to the inside assembly frame. Then release the latch and pull up the motherboard to detach it from the inside assembly frame.

  • Page 200: Removing The Pc Card Slot Unit

    4.5.8 Disassembling the Motherboard REMOVING THE PC CARD SLOT UNIT The PC Card Connector Module is normally part of the motherboard spare part. The following removal procedure is for reference only. Figure 4-24 Removing the PC Card Slot Unit REMOVING THE KEYBOARD CONNECTION BOARD Pull up the keyboard connection board to remove it.

  • Page 201: Removing The Touchpad

    4.5.9 Removing the Touchpad The touchpad is connected to the top cover. Follow these steps to remove the touchpad assembly: Peel off the mylar. Remove the three screws and disconnect the touchpad cable (J2), then remove the touchpad main sensor and connector unit. Lift up and remove the touchpad.

  • Page 202: Removing The Lcd Bumpers

    Disassembling the Display Follow these steps to disassemble the display: Remove the oval LCD bumpers at the top of the display and the long bumper on the LCD hinge. Figure 4-27 Removing the LCD Bumpers Remove five screws on the display bezel. Screw List: x4, M2.5L6 x1, M2.5L6(for 11.3”...

  • Page 203: Removing The Display Bezel

    Pull out and remove the display bezel by first pulling on the inside of the bezel sides and lower bezel area. Then pull up the top bezel area. Figure 4-29 Removing the Display Bezel Twist (1), then slide out (2) and remove the Hinge Cable Cover. Figure 4-30 Removing the Hinge Cable Cover The hinge cable cover cannot be removed unless the LCD bezel is...

  • Page 204: Removing The Lcd Panel

    Remove screws on the four sides of the display panel. Then gently fold back the foil around the display panel and unplug the inverter cable (J2). The encircled screw doesn’t exist in STN LCD model . Figure 4-31 Removing the LCD Panel Tilt the LCD Panel away for the display cover.

  • Page 205: Removing The Dc-Ac Inverter And Lcd Id Inverter Boards

    Remove the screws that secure the DC-AC Inverter Board to the display back cover and remove the inverter boards. Then unplug the display cable. Figure 4-33 Removing the DC-AC Inverter and LCD ID Inverter Boards Remove five screws that secure the LCD cable to the display back over, then remove the LCD cable assembly.

  • Page 206: Model Number Definition

    A p p e n d p e n d i x Model Number Definition This appendix shows the model number definition of the notebook. 610XX-X X X Keyboard Language Version 0: Swiss/US G: German 1: US(110V) I: Italian 2: US(220V) J: Japanese 3: US w/o power cord N: Norwegian...
  • Page 207 370PXX-X X X Hard Disk 0: No Hard Disk 3:340MB A: 1GB 1: 120MB 5:520MB C:1.35GB 2: 200MB 8:810MB D:1.4GB B: 250MB 9:1.3GB E: 2.1GB C :11.3" DSTN CX:11.3" TFT DX:12.1" TFT Service Guide...
  • Page 208 A p p e n d i x A p p e n d i x Exploded View Diagram This appendix shows an exploded view diagram of the notebook.
  • Page 209 Service Guide...
  • Page 210 Exploded View Diagram...

  • Page 211: Spare Parts List

    Spare Parts This appendix lists the spare parts of the notebook TI EXTENSA 610. Table C-1 Spare Parts List PART NAME ACER P/N TI P/N Ref. COMMENTS Exploded View << MECHANICAL & MODULES >>...
  • Page 212 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. COMMENTS Exploded View << DISPLAY COMMON PARTS >> 1 HINGE (L), SAE AN370, EXT 61X 34.46909.001 9813520-0001 2 HINGE ( R), EXT. 61X 34.46905.001 9811814-0001 3 MYLAR, LCD, 100MM, EXT 61X 40.46928.001...
  • Page 213 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. COMMENTS Exploded View << MAIN BD >> 1 IC CPU INTEL P54CSLM 120M 3.1V 01.IP54S.C0M 9811798-0001 2 IC CPU INTEL P54CSLM 150M 2.9V SPGA 01.IP54S.F0B 9815594-0001 3 IC CPU INTEL P55C (MMX) 150M 2.45V SPGA 01.ip55c.f00...
  • Page 214 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. COMMENTS Exploded View KEYBOARDS KB-84 KEY KAS1901-0161R US 370 (US) 90.46907.001 9805728-0001 w/cable Keyboard(UK) 90.46907.00U 9805758-0002 w/cable Keyboard(Germany) 90.46907.00G 9805758-0003 w/cable Keyboard(French) 90.46907.00F 9805758-0004 w/cable Keyboard(Spanish) 90.46907.00S...
  • Page 215 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. COMMENTS Exploded View SERVICE KITS 6M.48409.001 9815599-0001 MISC. PARTS PACK SCREW LCD CAP(47.46901.001) * 10 PCS see above kit CAP RUBBER(47.46917.001) * 10 PCS see above kit CLIPPER CABLE(42.46921.001) * 10 PCS...
  • Page 216 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N options Misc. EXT BTY CHARGER 91.48428.001 370P ONLY 91.48428.001 9811764-0001 EXT FLOPPY DRIVE 91.46905.002 370/370P 91.46905.002 9811765-0001 PS/2 CABLE 50.46812.001 50.46812.001 9811766-0001 FILE TRANSFER CABLE 50.30014.001 50.30014.001 9811767-0001...
  • Page 217 A p p e n d i x A p p e n d i x Schematics This appendix shows the schematic diagrams of the notebook.
  • Page 218 |HW_SET.SCH :H/W SET, RESET SIGNAL D28-D22 D14-D35 $CPUD29 $CPUD34 |BCO_CAP.SCH :BYPASS CAP. D29-C19 C13-D34 $CPUD30 $CPUD33 D30-D20 D16-D33 $CPUD31 $CPUD32 D31-C17 C15-D32 DSKT-P55C ACER $CPUD[0..63] TAIPEI TAIWAN R.O.C Title 370P/J (CPU) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 219 $BOFF# $HITM# $BOFF# $HITM# $NA# $NA# $BRDY# $BRDY# $AHOLD $AHOLD $KEN# $KEN# $CACHE# $CACHE# $MIO# $MIO# $HLOCK# $HLOCK# $DC# $DC# ACER TAIPEI TAIWAN R.O.C Title 370P/J (M1521 CPU TO PCI BRIDGE) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 220 CBE#1 17,21 PERR# GNT#1 REQ#2 CBE#3 GNT#1 GNT#0 CBE#2 REMOVE BUS BRANCH:PRASJ[0..5] PHOLD# PHOLD# PHLDA# SRP4K7 PHLDA# 4,8,17,21 MREQJ PCIRST# ACER PCIRST# SERR# SERR# TAIPEI TAIWAN R.O.C Title 370P/J (M1521 PART2) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 221 PHOLD# PHOLD# $P23CLK $P23CLK 3.3V M1523 C175 SCD1U SA[0..16] SA[0..16] 8,9,10,11,13,15 SA17 DSD[0..15] DSD[0..15] SA18 SA19 LA[17..23] LA[17..23] IDE_DRQ0 ACER IDE_DRQ0 IDE_DRQ1 IDESCS3J IDE_DRQ1 IDESCS3J TAIPEI TAIWAN R.O.C IDEIOWJ IDESCS1J IDEIOWJ IDESCS1J IDEIORJ IDEPCS3J Title IDEIORJ IDEPCS3J IDERDY IDEPCS1J IDERDY IDEPCS1J 370P/J (M1523 PCI TO ISA &...
  • Page 222 PULL LOW: CYRIX LINEAR BURST MODE $CPUA12 $CPUA17 $CPUA13 $AMSTATE# CS1* $CPUA14 $CPUA16 $TWE# $CPUA15 S32K8-15 R100 $H_ZZ $AMSTATE# $AMSTATE# DUMMY-R3 ACER 3.3V R210 TAIPEI TAIWAN R.O.C FTNC Title 370P/J (256KB CACHE) 10KR3 Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 223 SCD1U MD27 MD59 MD28 MD60 MD29 MD61 3.3V MD30 MD62 MD31 MD63 C130 C259 C264 C269 SC10U16V SCD1U SCD1U SCD1U SDIMM144 CAS#[0..7] CAS#[0..7] ACER TAIPEI TAIWAN R.O.C Title 370P/J (DIMM SOCKET) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 224 SC47P 2MR5 CAN32768 U19C U19A C223 SCD1U ## REMOVE R65,R178,R182,R181,R66 PAD SSHC14 SSHC14 U19D 32K1 32K1 SSHC14 U19B 32K2 32K2 3,17 SSHC14 ACER TAIPEI TAIWAN R.O.C Title 370P/J (CY2263 CLOCK GENERATOR) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 225 SCD1U 3.3V SSHCT74 CLK4M U41C U13D 3.3V SSHCT74 $AMSTATE# DUMMY-R3 SSHCT04 SOLCX125M ACER SCD1U SCD1U U54 WILL NOT BE INSTALL. TAIPEI TAIWAN R.O.C RX3 MUST BE INSTALL. (THE VAULE IS 0) Title 370P/J (M7101 PMU) Size Document Number 96149 Date:...
  • Page 226 28F020-1 C266 SCD1U BIOSCE# S2N3906 U52 IS TSOP PACKAGE, +12V MUST BE INSTALL. R222 10KR3 FLASH_ON FLASH_ON RN1424 ## REMOVE U53 PAD ACER TAIPEI TAIWAN R.O.C Title 370P/J (RTC AND BIOS) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 227 XDATA 150R3 MLB321611 MINDIN6 XCLK KB BD CONN. R112 150R3 MLB321611 C167 SC47P C166 C132 C160 C133 C168 SC47P SC4D7U16V6ZY SCD1U SC47P SC47P ACER TAIPEI TAIWAN R.O.C Title 370P/J (KB CONTROLLER) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 228 PAUTOFD# ERROR# PERROR# PERROR# INIT# PINIT# PINIT# SLCTIN# PSLCTIN# PSLCTIN# SRN33 RP30 SLCT PSLCT PSLCT ACK# PACK# PACK# STROB# PSTROB# ACER PSTROB# TAIPEI TAIWAN R.O.C SRN33 Title 370P/J (NS87336 SUPER I/O) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 229 FDDIN# THIS CONN. IS BUILDED BY TOP VIEW, R119 FDDRDY# WE COUNT THE PINS MUST MIRROR IT. 100KR3 SSHCT32 EXT. FDD CONN. SSHC14 ACER TAIPEI TAIWAN R.O.C SCD1U Title 370P/J (||PORT,SERIAL PORT,EXT. FDD) Size Document Number 96149 Date: February 12, 1997...
  • Page 230 SSHCT32 SSHCT04 4K7R3 TPS2013D ## CHANGE COMONENT BT_QCHG BATCNTL R137 1KR3 IMD1A108 +12V 2N7002 R150 10KR3 R131 1MR3 R138 4K7R3 ACER 5VSB_DC TAIPEI TAIWAN R.O.C Title BDATA 370P/J (GOLDEN FINGER I/F) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 231 1KR3 DSD15 IDE_D15 IDE_IOR# WRTPRT# IDEIORJ SRN47 47R3 1KR3 R184 RDATA# R205 ACER IDE_IOW# 1KR3 IDEIOWJ TAIPEI TAIWAN R.O.C 47R3 THESE RESISTORS MUST BE CLOSED FDD CONN. Title 370P/J (IDE & CD-ROM & FDD CONN) Size Document Number 96149 Date:...
  • Page 232 DRQ0 DACK#0 SA[0..15] 33.9M 33R3 C177 DRQ1 16.9M 24.6M C176 R144 SC10P DACK#1 SCD1U MK1422 X24I DRQ3 DACK#3 33R3 C184 SC10P 4,9,10,11,13 SD[0..7] ACER TAIPEI TAIWAN R.O.C Title 370P/J (AUDIO YMF-715) Size Document Number 96149 Date: January 27, 1997 Sheet...
  • Page 233 SSHCT32 R213 CON2-10 33R3 C252 BUZZER-3 47KR3 U44C C254 SC22P SMPSA13 PCMSPK SCD1U CN10 ACER ## ADD RX1 SPKR_R TAIPEI TAIWAN R.O.C SPEAKERRB SSHCT32 S1N4148 Title CON2-10 370P/J (AUDIO AMP & CONN) Size Document Number 96149 Date: February 12, 1997...
  • Page 234 ENAVEE HSYNC HSYNC VSYNC VSYNC CT65550 ENAVDD 560R3 8,19 ENAVEE MOAT RGBGND 3,4,8,20,21,24 AD[0..31] RP28 RGBGND SRN22 ZV_HREF RP29 ZV_VREF ACER TAIPEI TAIWAN R.O.C SRN22 QPRN-R27C15 Title R[0..7] 370P/J (VGA CT65550) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 235 SSHC00 VAA0 VAA7 CX24 VAA1 VAA6 VAA2 VAA5 VAA3 VAA4 SCD1U ## CIRCUIT MODIFY , CHANGE COMPONENT S256K16-60 SCD1U VMBD[0..15] ACER TAIPEI TAIWAN R.O.C Title 370P/J (VRAM & VGA BYPASS CAPACITOR) Size Document Number 96149 Date: January 27, 1997 Sheet...
  • Page 236 CRT_VS THIS CONN. IS LCD INTERFACE CONN. CRT_B CRT_B CRT_HS CRT_HS CRT_G CRT_G DDC_DATA CRT_R 33R3 CRT_R VIDEO-15-4-D R125 VSW1 1KR3 ACER TAIPEI TAIWAN R.O.C Title 370P/J (CRT CONN.& ZV PORT) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 237 22R3 3.3V SOLCX125M U34C R128 100R3 CPU_TH AD17 3,4,8,17,21 SSLVC125 CON2-10 SC100P U26A COVER_SW R133 ENBL CCFT_ON 100R3 SSHC125 COVER_SW R134 10KR3 10KR3 ACER TAIPEI TAIWAN R.O.C Title 370P/J (LCD I/F) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 238 R149 DUMMY-R3 3.3V PCI1131 C189 SC33P B_RESET A_D[0..15] B_D[0..15] A_D[0..15] B_A[0..25] B_VS2 B_INPACK# A_CE1# A_A[0..25] 15,19,22 ACER B_REG# A_CE2# B_VS1 A_OE# TAIPEI TAIWAN R.O.C B_IREQ# A_IORD# A_IOWR# Title B_WAIT# B_SPKR# 370P/J (PCI1131 CARD BUS CONTROLLER) B_STSCG# Size Document Number B_WP...
  • Page 239 B_VS1 A_VS1 A_A8 A_A7 A_WP A_A22 A_SPKR# 22KR3 22KR3 22KR3 A_A12 A_A15 R186 A_WAIT# B_CD2# A_CD2# A_A9 ACER SRP10K 22KR3 22KR3 22KR3 TAIPEI TAIWAN R.O.C B_CD1# A_CD1# A_A11 Title 370P/J (PCMCIA SOCKET) 22KR3 22KR3 22KR3 Size Document Number 96149 Date:...
  • Page 240 U1XB 220KR3 CX18 SCD1U RESERVE 5VSB_DC U1XC TSHC02 10KR3 SCD1U TSHC02 BAT_USE# BBL2# BBL1# 470R3 470R3 470R3 6377_BBL2# 6377_BIU# ACER 6377_BBL2# 6377_BIU# 8,16 6377_BBL1# 6377_BBL1# TAIPEI TAIWAN R.O.C Title 370P/J (CHARGER,DC/DC) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 241 U46D SSHC14 SSHCT04 U46E U41E U45D SSHCT04 A_CD1# A_CD2# SSHCT04 U17D SSHCT32 U46A EXCACD# U41F SSHC00 U44A SSHCT04 B_CD1# SSHCT04 ACER B_CD2# TAIPEI TAIWAN R.O.C SSHCT32 Title 370P/J (H/W JUMPER SETTING) Size Document Number 96149 Date: February 12, 1997 Sheet...
  • Page 242 CLOSE TO PIN 105 3.3V SCD1U SC4D7U16V6ZY SC1000P50V3KX 3.3V C102 SCD1U SC1000P50V3KX C262 C109 SCD1U SCD1U CLOSE TO PIN 53 CLOSE TO PIN 72 C227 SC10U16V ACER TAIPEI TAIWAN R.O.C Title 370P/J (BYPASS CAPACITORS) Size Document Number 96149 Date: January 27, 1997 Sheet...

  • Page 243: Post Checkpoint List

    A p p e n d p e n d i x BIOS POST Checkpoints This appendix lists the POST checkpoints of the notebook BIOS. Table E-1 POST Checkpoint List Description Checkpoint Check CPU ID Dispatch Shutdown Path Note: At the beginning of POST, port 64 bit 2 (8042 system flag) is read to determine whether this POST is caused by a cold or warm boot.
  • Page 244 Initialize Video display ChipUp initialization for CPU clock checking Process VGA shadow region Set POST screen mode(Graphic or Text) Display Acer(or OEM) logo if necessary Display Acer copyright message if necessary Display BIOS serial number Memory testing SMRAM test and SMI handler initialization...
  • Page 245 Table E-1 POST Checkpoint List (Continued) Checkpoint Description Reset pointing device Check pointing device Parallel port testing Serial port testing Math Coprocessor testing Set security status KB device initialization Set KB led upon setup requests Note: If keyboard Number Lock is enabled, the NumLock LED (if present) should be turned on.

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