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TRC-70
« A/D converter
The forward wave, reflected wave, phase, and im-
pedance IZi voltages obtained by the sensor circuit are
@
R28 10K
CHR
Ww
a
a
>
"~
Zz
R27
t0K
CHa
R25
10K
F
avy
_—_
CHO
I C 4
a
a
,
cna 7 cna [22 4
2acus
cH2 p22 —~«4
__
Nv
>
—
a
34 cue
cnt eo
4
|
R26
10K
mr
4b on?
cro (oe
B=
sor]
ST vce
GND
ca
°
al
+ Digital circuit configuration
Tm
= sup
wee -
The digital circuit consists of the following ICs with
Coe
8
)
the CPU (IC6 : HD6301V1KO8P¥) as center.
no [ris af, =
[20
IC5 (uPD4053BC) is used to set the CPU operation
curs
of,e,
cpa.
mode, A/D converter !C4 (uPD7004C), driver IC1
p2
Pes
tg
lc HE
(uPB553A), 1C2 (MSM5501) to count the 16-divided
Pe
[pie
dogs
= cic 2
frequency, latch IC (uPDHC373) to be set on a bus line,
dam
pales
Td
IC7 through IC9 (4PDHC373) to latch data output from
Ps
[Pio
dopo
vss be
the CPU, IC10 through 1C12 to relay the latched output
Pie
th
.
or to drive an LED, 1C14 (TL7705ACP) to generate a
aN
"he"
reset pulse during a power-on or -off sequence, and
°8
switching 1C16 (uPD40118) to stop clock oscillation to
1
reduce CPU clock pulse noise.
q
items.
CH2
Phase
CHS
1C4
a
From sencor
. tho 7 kPD7004C DBO ~ DB7
HI
R oH
Ic6
reneney
co
p30 ~ P32
Po
1C1
1C2
IC3
ae
or
~
pPBS53A
MSM65501
proncers
P10 ~ P17
1C7 ~9
110 ~ 12
DOO ~ DO7L--4 LH PDHC373}_»4
TD62003
|»
Relay
[piv m6}
count | ics
P20 ~ P22
LED
HPO
Out
a
put
4053BC
set
latch
CPU
'
# Reset
| oP SET
(C14
°
ITL7705AC
TT
Ici6
pPD4011B
;
_
.
;
TS
Q7: RN2001
Fig. 7 Digital circuit block diagram
¢
Output block
113
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