Sony ICB-U655 Service Manual page 12

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• Waveforms
– RF Board –
– MICRO COMPUTER Board –
1 IC2 1 (OSC IN) (TX mode)
3 IC109 2 (XTAL) (TX mode)
500 mV/DIV, 20 ns/DIV
1 V/DIV, 500 ns/DIV
940 mVp-p
2.7 Vp-p
47.1 ns
1 µ s
2 IC3 1 (OSC IN) (TX mode)
4 IC101 %∞ (XT1) (RX/TX mode)
500 mV/DIV, 20 ns/DIV
1 V/DIV, 10 µs/DIV
2.5 Vp-p
1.6 Vp-p
30.5 µ s
47.1 ns
5 IC101 %• (X1) (RX/TX mode)
1 V/DIV, 100 ns/DIV
2.3 Vp-p
238 ns
– 19 –
All manuals and user guides at all-guides.com
• IC Block Diagrams
– RF Board –
IC1 µPC2757T-E3
IC2 TA31136FN
RF IN
1
6
IF OUT
16
15
14
13
12
11
10
9
MIXER
GND
2
5
VCC
L.P.F
RSSI
NOISE
QUADRATURE
COMPARATOR
DETECTION
POWER
LO IN
3
4
DETECTOR
SAVE
NOISE
BUFFER
AMP
IF AMP
LOCAL
FILTER
OSCILLATION
AMP
1
2
3
4
5
6
7
8
IC3 MB15E03LPFV1-G-BND-ER
fr
CRYSTAL
φR
OSC IN
1
16
PHASE
OSCILLATOR
COMPARATOR
φP
OSC OUT
2
CIRCUIT
15
DIGITAL LOCK
DETECT
CIRCUIT
BINARY 14 BIT
SW
FC
LDS
REFERENCE COUNTER
SELECT
14 BIT LATCH
3 BIT LATCH
14
LD/FOUT
CIRCUIT
19 BIT
CNT
SHIFT REGISTER
13
ZC
POWER
7 BIT LATCH
11 BIT LATCH
SAVE
12
PS
CIRCUIT
BINARY 7 BIT
BINARY 11 BIT
SWALLOW
PROGRAMMABLE
VP
3
SUPER
COUNTER
COUNTER
VCC
4
CHARGER
fp
DO
5
GND
6
CONTROL
11
LE
1 BIT
XFIN
7
PRESCALER
64/65
FIN
8
128/129
10
DATA
9
CLOCK
– 20 –
– MICRO COMPUTER Board –
IC102 NJM2070M
8
NC
BIAS
7
VCC
NC
1
+IN
2
+
6
OUTPUT
–IN
3
GND
4
5
POWER GND
IC109 MX165CDW-TR
TONE
TONE IN
+
DECODE
24
TONE IN
PULSE
FILTER
TONE
ROM
23
RX AUDIO IN
VDD
1
VREF
22
TX AUDIO IN
21
BIAS
20
TX AUDIO OUT
AUDIO
CLK
XTAL/CLK
2
FILTER
19
RX AUDIO OUT
XTAL
3
CLK
LOAD/LATCH
4
D5/SERIAL EN 1
DIGITAL
5
18
PTL
INTERFACE &
D4/SERIAL EN 2
6
17
RX/TX
CLOCK
D3/SERIAL DATA
7
GENERATOR
CLK/XTAL
TONE OUT
D2/SERIAL CLK
8
16
TX TONE OUT
FILTER
D1/DATA IN 1
9
CLK/XTAL
TONE DECODE
D0/DATA IN 0
10
15
RX TONE OUT
LOGIC
DECODE
14
COMPARATOR IN
VSS
11
13 RX TONE DET OUT
DECODE
+
12
COMPARATOR REF.
– 21 –
5-4. IC PIN FUNCTION DESCRIPTION
• MICRO COMPUTER BOARD IC101 µPD753012AGC-F00-3B9 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 12
LCD6 to LCD17
O
Segment drive signal output to the liquid crystal display (LCD101)
13
O
STRB
Serial data latch pulse output to the CTCSS encoder/decoder (IC109)
14 to 20
Not used (open)
21, 22
O
LCD18, LCD19
Common drive signal output to the liquid crystal display (LCD101)
23, 24
Not used (open)
25
O
BIAS
Liquid crystal display drive bias control output terminal
26 to 28
VLC0 to VLC2
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
29
LED
O
LED drive signal output for the LCD back light on/off control "L": LED on
30
Not used (open)
Power save control signal output terminal
31
O
POWER SAVE
"L": power on, "H": power off (when receive, squelch on mode)
Power supply control signal output for the transmit/receive selection
32
TX/RX
O
"L": receive, "H": transmit
33
VSS
Ground terminal
34
O
AF POWER
Power supply on/off control signal output of the power amplifier (IC102) "L": power on
35
MUTE
O
Muting on/off control signal output for the receiver system "L": muting on
36
O
TX MUTE
Muting on/off control signal output for the transmit system "H": muting on
37
V1-OUT
O
Control signal output for the battery detection circuit
38
POWER
I
POWER switch (S101) input terminal "L" is input when key pushing
39
PTT
I
Transmit detection signal input terminal
40
T/C
I
CH/GROUP switch (S102) input terminal "L": CH, "H": GROUP
41
Not used (open)
42
P10
I
Tone detection signal input terminal
43
LD
I
Synthesizer unlock detection signal input from the PLL frequency synthesizer (IC3)
44
LBL
I
LIGHT/BATT H switch (S103) input terminal "H" is input when key pushing
45
I
SQL
Squelch detection signal input from the TA31136FN (IC2) AF signal mute when "L" input
46
CH (+)
I
CH (+) switch (S104) input terminal "L" is input when key pushing
47
I
MODE
MODE switch (S105) input terminal "L" is input when key pushing
48
MONITOR
I
Not used (open)
49
Not used (open)
50
CH (–)
I
CH (–) switch (S106) input terminal "L" is input when key pushing
51
BEEP
O
Beep sound signal output to the power amplifier (IC102)
52
1kHz OUT
O
1 kHz signal output for the search mode
Main system power supply (+2.9V) on/off control signal output terminal
53
O
MAIN +B
"L": power off, "H": power on
54
VDD
Power supply terminal (+3V)
55
I
XT1
Sub system clock input terminal (32.768 kHz)
56
XT2
O
Sub system clock output terminal (32.768 kHz)
57
IC
Internal connection terminal (connected to power supply (+3V))
58
X1
I
Main system clock input terminal (4.194304 MHz)
59
O
X2
Main system clock output terminal (4.194304 MHz)
60
LE
O
Serial data latch pulse output to the PLL frequency synthesizer (IC3)
61
DATA
O
Serial data output to the CTCSS encoder/decoder (IC109) and PLL frequency synthesizer (IC3)
Serial data transfer clock signal output to the CTCSS encoder/decoder (IC109) and PLL
62
CLOCK
O
frequency synthesizer (IC3)
63
CARIA
O
Transmit system power supply on/off control signal output terminal "H" active
– 22 –

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