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1 Overview
1.1 Features
The S1C31D41 is a 32-bit MCU that includes an Arm
called the HW Processor. The HW Processor features 2-channel Voice/Audio Playback such as BGM + voice, Voice
Speed Conversion, and Self Memory Check without using any CPU resource. With the HW Processor, a low mem-
ory footprint and multi-language support are achievable because of its integrated high-compression/high-sound-
quality algorithm for voice and audio. In addition to a speaker, though generally difficult, it allows small-sized
equipment, which cannot mount a speaker, to playback voice and audio using a buzzer. The S1C31D41 is suitable
for home electronics, white goods, and battery-based products, which require a voice and audio playback function.
S1C31D41 lineup
CPU
CPU
Other
Embedded Flash memory
Capacity
Erase/program count
Other
Embedded RAMs
General-purpose RAM
Voice RAM
Instruction cache
HW processor (HWP)
Sound play function
Sound algorithm
Playback channels
Sampling frequency
Bitrate
Playback speed conversion
Playback pitch conversion
Sound output
Other
Memory check function
Embedded RAM check
Embedded Flash check
External QSPI-Flash check
Sound DAC (SDAC2)
Sampling frequency
Serial interfaces
UART (UART3)
Synchronous serial interface (SPIA)
Quad synchronous serial interface
(QSPI)
I
C (I2C)
2
*1
DMA controller (DMAC)
Number of channels
Data transfer path
Transfer mode
DMA trigger source
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Cortex
®
Table 1.1.1 Features
32-pin package
Arm
32-bit RISC processor Cortex
®
Serial-wire debug ports (SW-DP) and a micro trace buffer (MTB) included
96K bytes (for both instructions and data)
1,000 times (min.) * When being programmed by the dedicated flash loader
On-board programming function
Flash programming voltage can be generated internally.
8K bytes
18K bytes (Usable as a general-purpose RAM when the HW processor is inactive.)
512 bytes
EPSON high quality and high compression algorithm (EOV: EPSON Original Sound Format)
2 channels with mixing supported (e.g. Ch.0: voice, Ch.1: BGM)
15.625 kHz
16/24 kbps
75% to 125%, 5% steps (when used alone)
85% to 115%, 5% steps (when used in combination with playback pitch conversion)
* Available only in Ch.0
75% to 125%, 5% steps (when used alone)
90% to 110%, 5% steps (when used in combination with playback pitch conversion)
* Available only in Ch.0
Speaker output and buzzer output
Voice/audio playback using an electromagnetic or piezoelectric buzzer
Tone generator function
Read/write check, March-C
Checksum, CRC
Checksum, CRC
15.625 kHz
3 channels
Baud-rate generator included, IrDA1.0 supported
Open drain output, signal polarity, and baud rate division ratio are configurable.
Infrared communication carrier modulation output function
3 channels
2 to 16-bit variable data length
The 16-bit timer (T16) can be used for the baud-rate generator in master mode.
1 channel
Supports single, dual, and quad transfer modes.
Low CPU overhead memory mapped access mode that can directly read data from the
external flash memory with XIP (eXecute-In-Place) mode.
3 channels
Baud-rate generator included
4 channels
Memory to memory, memory to peripheral, and peripheral to memory
Basic, ping-pong, scatter-gather
UART3, SPIA, QSPI, I2C, T16B, ADC12A, and software
Seiko Epson Corporation
-M0+ processor and a specific hardware block
®
48-pin package
-M0+
®
1 OVERVIEW
64-pin package
1-1
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