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No.
Pin Name
I/O
132
O Column address strobe for byte 2
CAS2
141
O Column address strobe for byte 1
CAS1
138
O Column address strobe for byte 0
CAS0
140
O Row address strobe for second bank
RAS1
139
O Row address strobe for first bank
RAS0
137
O write enable
WE
− n/a
135
Video Output Interface (22)
180-178
R,G,B
O Analog RGB video
175,174
Y,C
O Analog S video
173
CVBS
O Analog composite video
182
IREFRGB
181
VREFRGB
177
IREF
176
VREF
186
PIXCLK2X
I/O 2x pixel clock
195-188
YCO[7]-[0]
I/O Digital multiplexed video output
196
HSO
O Horizontal sync for external DENC
197
VSO
O Vertical sync for external DENC
185
CFC
Audio/AC3 compressed data Interface (10)
168
AUDCLK1
I/O PCM oversampling clock
169
SCLK1
I/O PCM bit clock
170
LRCK1
I/O PCM left/right clock
171
SDAT1
O PCM serial data to first DAC
164
AUDCLK2
I/O PCM oversampling clock
165
SCLK2
O PCM bit clock
166
LRCK2
O PCM left/right clock
167
SDAT2
O PCM serial data to second DAC
− n/a
163
− n/a
162
Extended Data Out DRAM
I
Reference current for RGB DAC
I
Reference voltage for RGB DAC
I
Reference current for Y, C, CVBS DAC
I
Reference voltage for Y, C, CVBS DAC
I
Chroma frequency control
no external AC3 decoder
BD-V1100, BD-V1110
Function
Synchronous DRAM
LDQM
O Lower byte data mask
O Chip select for first bank
CS0
O Column address strobe
CAS
O Chip select for second bank
CS1
O Row address strobe
RAS
O Write enable
WE
CLK
O Local SDRAM clock
external AC3 decoder
AUDCLK1
I/O PCM oversampling clock
SCLK1
I/O PCM bit clock
LRCK1
I/O PCM left/right clock
SDAT1
O PCM serial data to first DAC
AUDCLK2
I/O PCM oversampling clock
SCLK2
O PCM bit clock
LRCK2
O AC3 compressed data bit clock
SDAT2
O Word select
AC3 serial compressed data to AC3
SDAT3
I
decoder
Compressed data request from AC3
AC3REQ
I
decoder
59
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