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Motorola M68MPBF333 User Manual

Mcu personality board
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M68MPB333UM/D
REV 1
March 1998
M68MPBF333
MCU PERSONALITY BOARD
USER'S MANUAL
© MOTOROLA, INC., 1994, 1998; All Rights Reserved

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  • Page 1 M68MPB333UM/D REV 1 March 1998 M68MPBF333 MCU PERSONALITY BOARD USER’S MANUAL © MOTOROLA, INC., 1994, 1998; All Rights Reserved...
  • Page 2 Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur.

  • Page 3: Table Of Contents

    CONTENTS CONTENTS CHAPTER 1 GENERAL INFORMATION INTRODUCTION......................1-1 SPECIFICATIONS ......................1-2 EQUIPMENT REQUIRED....................1-2 CUSTOMER SUPPORT ....................1-3 CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION INTRODUCTION......................2-1 HARDWARE PREPARATION ..................2-1 2.2.1 Clock Select Header (W1) ..................2-5 2.2.2 VDDA Select Header (W2) ..................2-6 2.2.3 Voltage Reference High Select Header (W3)............
  • Page 4 SCHEMATIC DIAGRAMS INTRODUCTION......................6-1 FIGURES 2-1. M68MPBF333 (B version) Parts Location Diagram (top view)........2-3 2-2. M68MPBF333 (C version) Parts Location Diagram (top view)........2-3 2-3. MPB – MPFB Interconnection (with SDI Interface)............2-11 2-4. Active Probe Interconnection (with Active Probe Box) ..........2-14 3-1.
  • Page 5 CONTENTS TABLES (continued) 4-11. Logic Analyzer Connector J17 Pin Assignments.............. 4-9 4-12. Logic Analyzer Connector J18 Pin Assignments............4-10 4-13. Logic Analyzer Connector J19 Pin Assignments............4-11 4-14. Logic Analyzer Connector J20 Pin Assignments............4-11 M68MPB333UM/D...
  • Page 6 CONTENTS M68MPB333UM/D...

  • Page 7: Chapter 1 General Information

    GENERAL INFORMATION 1.1 INTRODUCTION This manual provides general information, hardware preparation, installation instructions, a quick start guide, and support information for the M68MPBF333 MCU Personality Board (MPB). The MPB is one component of Motorola’s modular approach to MC68F333 Microcontroller Unit-based product development.

  • Page 8: Specifications

    1.3 EQUIPMENT REQUIRED The external requirements for MPB operation are either an MPFB or MMDS system. For MMDS operation requirements, see the MMDS1632 Motorola Modular Development System User’s Manual, MMDS1632UM/D. For operation requirements for the MEVB, see this manual and the M68MPFB Modular Platform Board User’s Manual, M68MPFBUM/D.

  • Page 9: Customer Support

    GENERAL INFORMATION 1.4 CUSTOMER SUPPORT For information about a Motorola distributor or sales office near you call: AUSTRALIA, Melbourne – (61-3)887-0711 JAPAN, Fukuoka – 81-92-725-7583 Sydney – 61(2)906-3855 Gotanda – 81-3-5487-8311 Nagoya – 81-52-232-3500 BRAZIL, Sao Paulo – 55(11)815-4200 Osaka – 81-6-305-1802 Sendai –...
  • Page 10 GENERAL INFORMATION M68MPB333UM/D...

  • Page 11: Chapter 2 Hardware Preparation And Installation

    MPB jumper headers and the insertion point. There are two versions of the M68MPBF333: B and C. On the B version the MCU is installed in a production socket on the board (Figure 2-1 shows the B version board layout).
  • Page 12 MPB to its default setting by installing a user-supplied fabricated jumper. MPB333B ©1993 01 - RE90379W C1 + + C2 Clock Source MC68F333 Source VDDA C10 + Source External Ground Reference Mark Connection Source Figure 2-1. M68MPBF333 (B version) Parts Location Diagram (top view) M68MPB333UM/D...
  • Page 13 HARDWARE PREPARATION AND INSTALLATION 01 - RE90427W MPB33C C1 + + C2 S / N Clock Source Source Source + C5 C6 + External VDDA Ground Reference Mark Source Connection Figure 2-2. M68MPBF333 (C version) Parts Location Diagram (top view) M68MPB333UM/D...

  • Page 14: Jumper Header Types

    HARDWARE PREPARATION AND INSTALLATION Table 2-1. Jumper Header Types Jumper Header Type Symbol Description two-pin with cut-trace Two-pin jumper header with cut-trace short, designated WX, short where X = the jumper header number. If you cut the short, use a fabricated jumper to return the jumper header to its factory default state.

  • Page 15: Clock Select Header (W1)

    HARDWARE PREPARATION AND INSTALLATION 2.2.1 Clock Select Header (W1) Jumper header W1 connects the MCU external clock (EXTAL) pin to either an on-board or external (target-system) clock source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects the MPB on-board clock source;...

  • Page 16: Vdda Select Header (W2)

    HARDWARE PREPARATION AND INSTALLATION 2.2.2 VDDA Select Header (W2) Jumper header W2 selects the MPB VDDA power source: either MPB power (VDDI) or an external source. The drawing below shows the factory configuration: a cut-trace short between pins 1 and 2. This configuration connects filtered VDDI to VDDA.

  • Page 17: Voltage Reference High Select Header (W3)

    HARDWARE PREPARATION AND INSTALLATION 2.2.3 Voltage Reference High Select Header (W3) Jumper header W3 selects the voltage reference high (VRH) source: either MPB power (VDDA) or an external VRH source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects VDDA as the VRH source.

  • Page 18: Voltage Reference Low Select Header (W4)

    HARDWARE PREPARATION AND INSTALLATION 2.2.4 Voltage Reference Low Select Header (W4) Jumper header W4 selects the voltage reference low (VRL) source: either MPB power (VSSA) or an external VRL source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects VSSA as the VRL source.

  • Page 19: Mevb Configuration

    HARDWARE PREPARATION AND INSTALLATION 2.3 MEVB CONFIGURATION The MEVB contains: • MPB – MCU-device-specific board that defines which MCU is evaluated. • M68MPFB1632 Modular Platform Board (MPFB) – which provides the interface connections to the host computer, logic analyzer connections, and the platform for installing the MPB.
  • Page 20 HARDWARE PREPARATION AND INSTALLATION Figure 2-3. MPB – MPFB Interconnection (with SDI Interface) After you have installed the MPB, install the plastic overlay on the MPFB: place the overlay over logic analyzer connectors J12 through J20 and press down. Holes in the overlay slide down over plastic clips on the MPFB.

  • Page 21: Active Probe Configuration

    • Target Control Board (TCB) – the interface between the MPB, target system, and the station module. The TCB is supplied with the MMDS. For more information about the TCB refer to the M68MMDS1632 Motorola Modular Development System User's Manual, MMDS1632UM/D.
  • Page 22 HARDWARE PREPARATION AND INSTALLATION 4. Connect one end of the 01-RE90341W01 REV 0 active probe cable to connector P6 on the MMDS control board; connect the other end to connector J6 on the TCB. Connect one end of the 01-RE90340W01 REV 0 active probe cable to connector P5 on the MMDS control board;...

  • Page 23: Chapter 3 Mevb Quick Start Guide

    3.2 CONFIGURING THE MPFB This paragraph explains the MPFB jumper headers for operation with the M68MPBF333. The MPFB includes jumper-selectable options such as chip select usage, memory type selection and memory size selection for the pseudo ROM sockets, and reset data control.

  • Page 24: Mpfb Jumper Headers

    MEVB QUICK START GUIDE 3.2.2 MPFB Jumper Headers Configure your MPFB jumper headers per the instructions in Table 3-1. Table 3-1 contains information exclusively intended for quick start and ignores the other jumper headers. Table 3-1. MPFB Quick Start Jumper Header Configuration Jumper Header Type...

  • Page 25: Mevb Installation Instructions

    MEVB QUICK START GUIDE Table 3-1. MPFB Quick Start Jumper Header Configuration (continued) Jumper Header Type Description 1 2 3 Install a jumper on pins 1 and 2 for unrestricted writes to the memory devices in the pseudo ROM sockets (U2 & U4). Install a jumper on pins 1 and 2 to ground the A19 signal to the MPFB memory 1 2 3 arrays.
  • Page 26 MEVB QUICK START GUIDE Figure 3-1. MPFB Power Supply Connector CAUTIONS Do not use wire larger than 20 AWG in connector J5. Such wire could damage the connector. Turn off MEVB power when installing or removing the MPB from the MPFB. Sudden power surges could damage MEVB integrated circuits.

  • Page 27: Personal Computer - Bdm Connection

    MEVB QUICK START GUIDE 3.3.2 Personal Computer – BDM Connection Personal computer communication with the MEVB requires background debug mode (BDM) hardware. Connect your BDM hardware between your computer’s I/O port and the BDM header on the MPFB (MPFB connector J6). The drawing below shows signal assignments for connector J6.
  • Page 28 SRAMBAH FFFB44 symbol SRAMMCR FFFB40 Set SRAM Base Address mmw SRAMBAH 0001 Turn on SRAM mmb SRAMMCR 00 Check SRAM: Write Motorola 68300 Advanced MCUs mml 10000 4D6F746F mml 10004 726F6C61 mml 10008 20363833 mml 1000C 30302020 mml 10010 41647661...
  • Page 29 MEVB QUICK START GUIDE Display SRAM in DMM window mdf3 10000 Show variables in F6 area var.w CSORBT var.w CSBARBT Show variables in F6 area var.w SCIMCR var.w SYNCR Show F3 area as ASCII characters asciiF3 Using Block Fill to pause macro execution bf 400 2000 0 Now show memory values in F6 area mdf6...
  • Page 30 MEVB QUICK START GUIDE M68MPB333UM/D...

  • Page 31: Chapter 4 Mevb Support Information

    4.2 LOGIC ANALYZER CONNECTOR SIGNALS The tables of this chapter describe MPFB logic analyzer connector signals if you install an M68MPBF333 on the MPFB. The signal descriptions on J12 – J20 are the logic analyzer pin-outs on the plastic overlay supplied with the MPB.

  • Page 32: Logic Analyzer Connector J7 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-1. Logic Analyzer Connector J7 Pin Assignments Mnemonic Signal 1, 2 SPARE No connection OE(ALL) I/O PRU OUTPUT ENABLE – Input, active high; when low disables all PRU outputs. 4 – 11 PEPAR7 – PEPAR OUTPUTS – Output signals that show the complement (negated contents) of the PEPAR register.

  • Page 33: Logic Analyzer Connector J9 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-3. Logic Analyzer Connector J9 Pin Assignments Mnemonic Signal 1, 2 SPARE No connection OE(H) I/O PRU OUTPUT ENABLE – Input, active high; when low disables the port H outputs. 4 – 11 PH7 – PH0 PORT H I/O SIGNALS –...

  • Page 34: Logic Analyzer Connector J11 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-5. Logic Analyzer Connector J11 Pin Assignments Mnemonic Signal +5 VDC POWER – Input voltage (+5Vdc @ 1.0 A) used by the MEVB logic circuits. (To make this pin a no connection, remove the jumper from jumper header W9 on the MPFB.) SPARE No connection...
  • Page 35 MEVB SUPPORT INFORMATION Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Mnemonic Signal LAT-DSI / LATCHED INSTRUCTION FETCH (INVERTED) – (Latched Latched output signal of the inverted state of IFETCH IFETCH) for CPU32-based MCUs; indicates instruction pipeline activity. DEVELOPMENT SERIAL OUT – Serial data output signal for background debug mode.

  • Page 36: Logic Analyzer Connector J13 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Mnemonic Signal SIZ0 TRANSFER SIZE – Output signal that indicate the number of bytes still to be transferred during this cycle. READ/WRITE – Output signal that indicates the direction of data transfer on the bus.
  • Page 37 MEVB SUPPORT INFORMATION Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued) Mnemonic Signal DATA STROBE – Active-low output signal. During a read cycle, indicates that an external device should place valid data on the data bus. During a write cycle, indicates that valid data is on the data bus.

  • Page 38: Logic Analyzer Connector J14 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued) Mnemonic Signal A19 / ADDRESS BUS BIT 19 – One bit of the 24-bit address bus. CHIP SELECT 6 – Output signal that selects peripheral or memory devices at programmed addresses. 17 –...

  • Page 39: Logic Analyzer Connector J15 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-9. Logic Analyzer Connector J15 Pin Assignments Mnemonic Signal 1 – 3 SPARE No connection 4 – 8 GROUND T2CLK TPU CLOCK – External input clock source to the TPU. 10 – 17 TPU15 – TPU8 TIME PROCESSOR UNIT CHANNELS –...

  • Page 40: Logic Analyzer Connector J18 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-11. Logic Analyzer Connector J17 Pin Assignments (continued) Mnemonic Signal PCS0 / PERIPHERAL CHIP SELECT 0 – Active-low output SPI peripheral chip select signal. SLAVE SELECT – Bi-directional, active-low signal that initiates serial transmission when SPI is in slave mode; causes mode fault in master mode.

  • Page 41: Logic Analyzer Connector J19 Pin Assignments

    MEVB SUPPORT INFORMATION Table 4-12. Logic Analyzer Connector J18 Pin Assignments (continued) Mnemonic Signal VOLTAGE REFERENCE HIGH – Input reference supply voltage (high) line (must set jumper on the MPB). 12 – 15 AN4 – AN7 ANALOG INPUT 4 –7 – Analog input line to the MCU device.
  • Page 42 MEVB SUPPORT INFORMATION 4-12 M68MPB333UM/D...

  • Page 43: Chapter 5 Mapi Support Information

    MAPI SUPPORT INFORMATION CHAPTER 5 MAPI SUPPORT INFORMATION 5.1 INTRODUCTION This chapter information pertains to installing the MPB on a target system. The figures in this chapter show the MAPI interface connector layout and pin assignments for MPB connectors P1, P2, P3, and P4 (Figures 5-1 through 5-5). 5.2 MAPI BUS CONNECTORS The connectors required to interface to the MAPI bus are: 2 –...

  • Page 44: Mapi Interface Connector P1 Pin Assignments

    MAPI SUPPORT INFORMATION PCS0 / SS / PQS3 SCK / PQS2 MOSI / PQS1 MISO / PQS0 TPUCH0 TPUCH1 TPUCH2 TPUCH3 TPUCH4 TPUCH5 TPUCH6 TPUCH7 TPUCH8 TPUCH9 TPUCH10 TPUCH11 TPUCH12 TPUCH13 TPUCH14 TPUCH15 T2CLK A23 / CS10 / E A22 / CS9 / PC6 A21 / CS8 / PC5 A20 / CS7 / PC4 A19 / CS6 / PC3...

  • Page 45: Mapi Interface Connector P2 Pin Assignments

    MAPI SUPPORT INFORMATION PCS1 / PQS4 PCS2 / PQS5 PCS3 / PQS6 TXD / PQS7 No Connect A3 / PB0 A4 / PB1 A5 / PB2 A6 / PB3 A7 / PB4 A8 / PB5 A9 / PB6 A10 / PB7 A11 / PA0 A12 / PA1 A13 / PA2...

  • Page 46: Mapi Interface Connector P3 Pin Assignments

    MAPI SUPPORT INFORMATION VSSA PADA5 / AN5 VSSA PADA6 / AN6 VSSA PADA7 / AN7 VSSA VSSA PADB0 PADB1 PADB2 PADB3 PADB4 PADB5 PADB6 PADB7 VSTBY DSO / IPIPE DSI / IFETCH HALT RESET BERR BKPT / DSCLK FREEZE MAPI-EXTAL CLKOUT Figure 5-4.

  • Page 47: Mapi Interface Connector P4 Pin Assignments

    MAPI SUPPORT INFORMATION D0 / PH0 D1 / PH1 D2 / PH2 D3 / PH3 D4 / PH4 D5 / PH5 D6 / PH6 D7 / PH7 D8 / PG0 D9 / PG1 D10 / PG2 D11 / PG3 D12 / PG4 D13 / PG5 D14 / PG6 D15 / PG7...
  • Page 48 MAPI SUPPORT INFORMATION M68MPB16Y3UM/D...

  • Page 49: Chapter 6 Schematic Diagrams

    SCHEMATIC DIAGRAMS CHAPTER 6 SCHEMATIC DIAGRAMS 6.1 INTRODUCTION This chapter contains the M68MPB916R3 MCU Personality Board (MPB) schematic diagrams. These schematic diagrams are for reference only and may deviate slightly from the circuits on your MPB. M68MPB333UM/D...
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  • Page 58 SCHEMATIC DIAGRAMS 6-10 M68MPB333UM/D...

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