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JVC XV-S40BK Service Manual page 32

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XV-S40BK/XV-S42SL/XV-S45GD
XV-S30BK/XV-E100SL
MN103S28EGA (IC301) : Super optical disc controller
1.Terminal layout
176
133
1
132
44
89
45
88
2.Block diagram
Analog
Servo I/O
(core 1 I/O)
Servo core
(core 2)
RAM
CIRC
3.Pin function (1/4)
Symbol
Pin No.
1,2
NINT0,1
3
VDD3
4
VSS
5
NINT2
6
WAITDOC
7
NMPST
8
DASPST
9~17
CPUADR17~9
18
VDD18
19
VSS
20
DRAMVDD18
21
DRAMVSS
22~30
CPUADR8~0
31
VDD3
32
VSS
33
DRAMVDD3
34
NCS
35
NWR
1-32
DVD-ROM
Formatter
CD-PRE
Instruction
CGEN
memory
(40KB)
Data
MODE
memory
(6KB)
General purpose IO bus
16 bit
WDT
timer x 2
I/O
Interruption of system control 0,1
O
-
Power supply terminal for I/O(3.3V)
Connect to ground
-
Interruption of system control 2
O
Wait control of system control
O
Reset of system control (Non connect)
O
I
Setting of initial value of DASP signal
System control address
I
Power supply terminal for I/O (1.8V)
-
Connect to ground
-
Power supply terminal for DRAM (1.8V)
-
-
Connect to ground for DRAM
System control address
I
Power supply terminal for I/O (3.3V)
-
Connect to ground
-
Power supply terminal for DRAM (3.3V)
-
I
System control chip select
Writing system control
I
Host I/F
DMA
ECC
MPEG I/F
I/F
High speed IO bus
DMA
32 bit
CPU core
BCU
DRAMC
SYSTEM
INTC
I/F
Description
ATAPI
2Mbit
DRAM

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