Blockdiagram - Philips AZ9218 Service Manual

BLOCKDIAGRAM

DISC
TURNTABLE
MOTOR
12 10
LD
TRACK
SERVO
9
FOCUS
SERVO
11
SLIDE
SERVO
Laser
diode
Monitor
diode
PHOTO DIODE
ARRAY
D1 D2
R1 R2
D3
VAM2103/08
CD-DRIVE
FLEX PCB
Focus±
eye-pattern signal
during focus search
> 800 mVpp
2,5V
1 9
0
-2,5V
TB=0.5µs
CS 46 673
3-8
+2.7
RESET
4MHz
MEMBRANE
KEYBOARD
RCI, RCO
1)
RC RC-CIRCUIT
(FROM/TO RC-SOCKET)
+2.7
LO VDDL
LDON H=Laser on
Lo Vddl LDon
HF-GAIN
LASER
1
SUPPLY &
L.P.F. Hf RFE HFIN
+
PROTECT.
MI
H.P.F.
R1 O6 D5 R1
L.P.F. L.P.F.
R2 O5 D1 R2
L.P.F. L.P.F.
D1 O1 D2 D1
L.P.F. L.P.F.
D2 O3 D3 D2
L.P.F. L.P.F.
D3 O4 D4 D3
L.P.F. L.P.F.
D4
L.P.F. L.P.F.
TDA1300T
YFLAG
HF-PREAMPLIFIER (TO NPC)
+A +2.7
2xVOLTAGE
+1.4 +2.7 OSCILLATOR
DOUBLER
VR VLG VG CLK
CLsaw
LOW VOLTAGE SAWTOOTH
DETECTOR OSCILLATOR
16
H-BRIDGE
DM± DM_IN DM_PWM
(FROM µP)
MOTOR DRIVER 4
L.P.F.
VG VLG VR CLsaw
H-BRIDGE SLIDE_IN SL
Sldm± (PWM signal)
MOTOR DRIVER 2
L.P.F.
VG VLG VR CLsaw
H-BRIDGE
FOCUS_IN FO (PWM signal)
MOTOR DRIVER 1
L.P.F.
VG VLG VR CLsaw
Track± H-BRIDGE TRACK_IN RA (PWM signal)
MOTOR DRIVER 3
L.P.F.
VG VLG VR CLsaw
MPC17A50VM
SERVO DRIVER
servo in or disc motor cw
10
3V
not moving
11
0
servo out or disc motor ccw
TB=0.1s
12
-3V
LCD
+UP
VDD
P TMP86CH29
LF
RAM LCD DRIVER ROM
YMLD
YMCLK
CLOCK GEN. 16bit TIMER
YMDATA
ALU
& TIMING COUNTER
ZSENSE
SILD
RAB
SCL
SDA
SFSY (PWM_IN)
I/O PORTS
FROM/TO SUPPLY/ TO HEADPHONE AMP.
CHARGE CIRCUIT
8.4MHz
+2.7
PORES
(FROM µP)
LDON VDD
RESET
EBU
FRONT END TIMING
INTERFACE
SBSY
SFSY
ERROR MOTOR SUBCODE
DIGITAL PLL
CORRECT. CONTROL PROCESS.
EFM RAM PEAK
SRAM
DEMOD. ADDRESS. DET.
SILD
RAB
SCL
SDA
µP
CONTROL PART
INTERFACE
SCLK
WCLK
DATA
FUNCTION AUDIO SERIAL
PRE-PROC.
CONTROL PROCESS. INTERFACE
SCLI
WCLI
SDI
VERSATILE SERIAL
INTERFACE LOOPBACK
SAA7324H
OUTPUT BITSTREAM
KILL
CD10 STAGES DAC
SL FO RA
VOLUME
15
13
14
CD10 → NPC
NPC → CD10
2 5
13 servo out or disc motor cw
3V
14 not moving 3 6
15 servo in or disc motor ccw
4 7
0
16
3-8
SUPPLY/CHARGE CIRCUIT
+2.7
VCC
DRAM
+2.7
A0...A10, D0...D3
VDD
CAS, RAS, WE, OE
CHG_ON
DRAM INTERFACE (FROM µP)
ENCODER DECODER
YMLD
YMCLK
YMDATA
ZSENSE
CONTROLLER
INTERFACE
SBSY
SHOCK
CONTROL
YFLAG
(FROM
CD10)
INPUT BUFFER ATTENUATOR
YSCK
YLRCK
YSRDATA
INPUT I/O OUTPUT
INTERFACE EXTENSION INTERFACE
2-4
SM5903BF
NPC
RESET
ZSCK
5-7 ZLRCK
ZSRDATA NPC_RESET
(FROM µP)
MUTE HP_ON DBB_ON BEEP +A
(FROM µP) (FROM µP) (FROM µP) (FROM µP)
VCC
MUTE POW. DBB
BEEP
SW. SW. SW.
BIAS IN
BIAS
BIAS
IN A
A (RIGHT)
DBB OUT
ADD OUT
Vref
DBB
DBB NF
CONT.
B (LEFT)
IN B
RC-CIRCUIT)
TA2120FN
HEADPHONE AMP.
DBB_STEP
(FROM µP)
TRANSFER OF AUDIO SAMPLES VIA SERIAL INTERFACE OF CD10 AND NPC
SCLK
WCLK left channel right channel
DATA
+DC
DC_IN
(TO µP)
DC-in socket
+
+A
+2.7
DC/DC
+3
UP/DOWN
CONVERTER +1.25
+
DM_PWM
(FROM µP)
ACCU or charge
BATTERY
BATT_LEVEL
RECH. BATT.
(TO µP)
MEASURING
CHG_DET
PART
(TO µP)
+3 +1.25
ACCU ACCU_IN
(TO µP)
DETECT.
CHARGE
CONTROL
TEMP
TEMP.
(TO µP)
DETECT.
HEADPHONE&
RC-SOCKET
RC
(FROM/TO
1)
not on all versions