Siemens C16 Series Instruction Set Manual page 126

• Internal SFR operand reads: T Iadd = 0, 1
Mostly, SFR read accesses do NOT require additional processing time. In some rare cases,
however, either one or two additional state times will be caused by particular SFR operations, as
follows:
– Reading an SFR immediately after an instruction, which writes to the internal SFR space, as
shown in the following example:
I n : MOV T0, #1000h
I n+1 : ADD R3, T1
– Reading the PSW register immediately after an instruction, which implicitly updates the condition
flags, as shown in the following example:
I n : ADD R0, #1000h
I n+1 : BAND C, Z
– Implicitly incrementing or decrementing the SP register immediately after an instruction, which
explicitly writes to the SP register, as shown in the following example:
I n : MOV SP, #0FB00h
I n+1 : SCXT R1, #1000h
In these cases, the extra state times can be avoided by putting other suitable instructions before the
instruction I n+1 reading the SFR.
• External operand reads: T Iadd = 1
Any external operand reading via a 16-bit wide data bus requires one additional ALE Cycle Time.
Reading word operands via an 8-bit wide data bus takes twice as much time (2 ALE Cycle Times)
as the reading of byte operands.
• External operand writes: T Iadd = 0
Writing an external operand via a 16-bit wide data bus takes one additional ALE Cycle Time. For
timing calculations of external program parts, this extra time must always be considered. The value
of T Iadd which must be considered for timing evaluations of internal program parts, may fluctuate
between 0 state times and 1 ALE Cycle Time. This is because external writes are normally
performed in parallel to other CPU operations. Thus, T Iadd could already have been considered in
the standard processing time of another instruction. Writing a word operand via an 8-bit wide data
bus requires twice as much time (2 ALE Cycle Times) as the writing of a byte operand.
Semiconductor Group
30Mar98@15:00h
State or 2
*
; write to Timer 0
; read from Timer 1: T Iadd = 1
; implicit modification of PSW flags
; read from PSW: T Iadd = 2
; explicit update of the stack pointer
; implicit decrement of the stack pointer:
States
: T Iadd = 2
*
ACT
*
State ... 1 ACT
* *
126
C166 Family Instruction Set
Instruction State Times
States
*
State
*
States
*
Version 1.2, 12.97