Expansion Unit; Cpu Board (Spr) - Panasonic KX-NS500AG Service Manual

4.3.

Expansion Unit

The expansion unit is constructed by CPU Board (SPR) and Mother Board. The block diagram and operation
described here.
4.3.1.

CPU Board (SPR)

Fig.4 shows detail block diagram of CPU Board (SPR), and each function of CPU Board (SPR) is described in Table.6.
Cortex- A8
L1 32K/32K
L2 256K w/ECC
176K ROM
DC/DC(+3.3V,+1.8V,+1.1V)
Fig.4 CPU Board (SPR) Block Diagram
Table.6 CPU Board (SPR) Function Description
Card
CPU
DDR3
NAND Flash
FPGA
ARM
DDR3
DDR
Interface 128MB
300MHz
w/SED
Crypto
64K RAM 64K RAM
NAND
NAND
FLASH
256MB
etc.
Interrupt
Interrupt
SD
UART
GPIO
+5V
CPU controls the line card in the expansion unit by the control from an CPU Board (MPR).
DDR3 is main memory of CPU Board (SPR). Operating system, application program and concerning data are
stored in this memory.
CPU program is stored in this memory.
FPGA provides control and monitoring function of each line card.
Exp I/F
RJ45
External bus
8bit
AC_ALM, DC_ALM, System Reset, FPGA_REBOOT, DONE
Description
11
LED
NETREF
8bit
FH+CLK
(8MHz)
LVDS
Slave
Down
FPGA
Highway
Up
Highway
+5V
+15V
+3.3V
DC/DC
+VBAT
KX-NS500AG
of each card are