Rf Block; Figure 4. Rf Block Diagram - Motorola c18 Developer's Manual

Cellular engine module description
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Hardware Description
The RF output ports are MMCX-type, 50-ohm matched connectors, as follows:
• Cellular antenna connector for 800/1900 MHz and passive aGPS
• GPS antenna connector that supports an aGPS active antenna
3.1.2

RF Block

This section describes the c18 RF block. Figure 4 shows the RF block diagram:
Tri- Band
Ant.
Power
Detector
3.1.2.1
Receiver Path
The receiver uses a superhetrodyne architecture, which down-converts to an IF frequency and then to the baseband. The received
signal enters either the passive tri-band antenna, which supports cellular 800 MHz/1900 MHz and aGPS, or the active GPS
antenna, which supplies the required bias voltage for the active antenna circuitry. The signal is directed via the appropriate
duplexer to the programmable RFR3300 IC, where it undergoes preamplification (three LNAs, with one for each band) before
being down-mixed to the IF frequency of 183.6MHz and filtered. From there, the signal enters the IFR3300 IC, where it is
amplified to the required level with AGC circuitry, quadrature down-converted to baseband, filtered and sampled. The sampled
signal is then fed to the DSP section.
3.1.2.2
Transmit Path
The transmitter also uses a superhetrodyne architecture in which the signal is up-converted from baseband to IF and then to the
transmit frequency. The IQ baseband signals enter the RFT3100 IC, which quadrature up-converts to the IF frequency and then
to the transmit frequency using a single side-band up-converter, in order to eliminate the need for expensive IF filtering circuitry.
The signal is amplified to the required power level using the AGC circuitry. The signal is then fed into the power amplifiers via
Tx cleanup filters, which preserve the spectral purity. From there, the signal passes to the appropriate duplexer. The signal then
enters the power detection circuitry, which comprises a directional coupler and a detector. The power detection circuitry feeds
voltage proportional to the transmitted signal power back to the logic circuitry, thereby enabling proper power control.
14
Vcc
Active GPS
Ant (alt)
RFR3300
Rx FE
Cellular
PCS
3
GPS
Duplexers
Power control

Figure 4. RF Block Diagram

IFR3300
Rx
IF
VCO +
Loop Filter
Rx LO
Tx LO
Cell PA
RFT3100
PA Drivers
PCS PA
IF VCO tank
& Loop Filter
I/Q
Base
Dual
Synth.
Band
I/Q
Ref Osc.
19.2MHz
98-08901C63-A

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