3.4.9
3.5
Setup submenu: Chipset ........................................................................................... 40
3.5.1
3.5.2
3.5.3
3.6
Setup submenu: Security ........................................................................................... 47
3.6.1
3.7
Setup submenu: Boot ................................................................................................. 52
3.7.1
3.8
4.1
4.1.1
4.1.2
A.1
B.1
I/O Address Map .......................................................................................................... 67
B.2
Memory Address Map ............................................................................................... 68
B.3
IRQ Mapping Chart ..................................................................................................... 69
C.1
Digital I/O Programming ........................................................................................... 80
Preface
Security: Secure Boot ................................................................................... 48
XII