(1) 8-bit timer H compare register 0n (CMP0n)
This register can be read/written by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 8-3. Format of 8-Bit Timer H Compare Register 0n (CMP0n)
Address: FF18H (CMP00), FF1AH (CMP01)
Symbol
CMP0n
(n = 0, 1)
Caution CMP0n cannot be rewritten during timer count operation.
(2) 8-bit timer H compare register 1n (CMP1n)
This register can be read/written by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 8-4. Format of 8-Bit Timer H Compare Register 1n (CMP1n)
Address: FF19H (CMP10), FF1BH (CMP11)
Symbol
CMP1n
(n = 0, 1)
CMP1n can be rewritten during timer count operation.
An interrupt request signal (INTTMHn) is generated if the values of the timer counter and CMP1n match after
setting CMP1n in carrier generator mode. The timer counter value is cleared at the same time. If the CMP1n value is
rewritten during timer operation, transferring is performed at the timing at which the counter value and CMP1n value
match. If the transfer timing and writing from CPU to CMP1n conflict, transfer is not performed.
Caution In the PWM output mode and carrier generator mode, be sure to set CMP1n when starting the
timer count operation (TMHEn = 1) after the timer count operation was stopped (TMHEn = 0) (be
sure to set again even if setting the same value to CMP1n).
Remark n = 0, 1
CHAPTER 8 8-BIT TIMERS H0 AND H1
7
5
6
7
5
6
User's Manual U16227EJ2V0UD
After reset: 00H
R/W
3
2
4
After reset: 00H
R/W
3
2
4
1
0
1
0
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