Kenwood DV-502 Service Manual page 7

QQ
3 7 63 1515 0
Port No. Port Name
36 I REF YCC
35 V REF YCC
23 VDD RGB
24 VSS RGB
30 VDD YCC
31 VSS YCC
Shared memory interface
69~66 SMI ADR(0~3)
58~63 SMI ADR(4~9)
70~73 SMI ADR(10~13)
84~93 SMI DATA(0~15)
97~102
74,75 SMI CS(0,1)
76 SMI RAS
77 SMI CAS
78 SMI WE
79,80 SMI DQML, U
82 SMI CLKIN
95 SMI CLKOUT
Power supply
4,47,81,107
VDD3 3
136,159,184
14,37,64
TE
L 13942296513
94,119,149 VDD2 5
171 198
5,15,38,50
65 83,96
108,121,137 VSS
150,160,172
185,199
2-1 VFO controller : uPD16311(IC901)
Pin No. Pin Name
6
5 DOUT
9
8
52 OSC
15~26 S1/KS1~S12/KS12
44~39 G1~G6
27~32 S13/G16~S18/G11
35,36 S19/G11,S20/G19
50~46 LED1~LED5
10~13 KEY1~KEY4
www
1~4
14,33,45
51
.
34
7
CIRCUIT DESCRIPTION
I/O
I I REF DAC YCC
I Y REF DAC YCC
- YDDA RGB =2.5V
- GND
- YDDA YCC =2.5V
- GND
O Address bus SDRAM
O Address bus SDRAM
O Address bus SDRAM
I/O Data bus SDRAM
O Chip select bank 0,1
O RAS SDRAM
O CAS SDRAM
O SDRAM write enable
DQ MASK EN LOW,
O
UP
I SDRAM clock in
O SDRAM clock out
- 3.3V Power supply
- 2.5V Power supply
- GND
I/O
DIN I Inputs serial data at rising edge of shift clock,starting from lower bit.
Output serial data at falling edge of shift clock,starting from lower bit.
O
This is N-ch open-drain output pin.
STB - Strobe pin.
CLK I Reads serial data at rising edge, and output data at falling edge.
- Connect resistor for determining oscillation frequency to this pin.
O Segment output pins (Dual function as key source).
O Grid output pins.
O These pins are selectable for segment or grid output.
O Unused.
I Data input to these pins is latched at end of display cycle.
NC - Unused.
VDD - +5V power supply.
x ao
y
VSS - Connect this pin to GND of system.
i
VEE - -35V power supply.
NC - Unused.
DV-502/503/DVF-3050/3550
8
Main
Function
Q Q
3 6 7 1 3
Description
u163
.
2 9 9 4 2 8
Alternate function
Input
1 5 0 5 8 2 9 9 4
m
co
9 9
Output
2 8 9 9
7