Circuit Description; Recording/Playback Operation; I/O Ports - Kenwood VGS-1 Service Manual

VGS-1

Recording/Playback Operation

■ Recording
The audio signal input from the AI pin (CN1 pin 12) passes
through a buffer amplifier (IC52 2/2) and goes to an anti-
aliasing filter amplifier (IC52 1/2).
The audio signal is amplified by approx. 30 times by IC52
1/2 and unwanted signal components exceeding 4kHz are
cut by an LPF.
The amplified audio signal is input to pin 78 of the MCU
(IC2 : Micro Controller Unit).
The MCU converts the audio signal to a digital data (by
8kHz/8-bit sampling) and writes it into a flash memory (IC3,
IC5).
When the input level of the AI pin is 100mVp-p, the MCU
input becomes approx. 3Vp-p, and the maximum S/N can be
achieved.
If a signal exceeding 100mVp-p is input to the AI pin, it is
clipped by IC52 so that the MCU input does not exceed 3Vp-
p to protect the MCU against over-voltage input.
■ Playback and Prerecorded Voice
The audio signal saved in flash memory (IC3, IC5) is con-
verted to an analog signal by the MCU (IC2) and output as a
playback signal from pin 84.
This playback signal passes through two LPFs to cut har-
monic components and is input to the attenuator circuit.
The attenuator circuit consists of analog switch ICs (IC53,
IC54) and division resistors (R64, R66, R67, R71, R72).
The signal attenuated by the attenuator circuit is con-
verted to a low impedance by an output buffer (IC55), then
output from the AO pin (CN1 pin 11).
–
AI
+
IC52
Buffer
IC53,IC54
–
AO
+
IC55
Buffer
Fig. 1 Signal flow
■ Attenuator Circuit
An attenuator circuit with division resistors is built by con-
trolling four analog switches of IC53 and IC54 with pins 95 to
98 of the MCU (IC2).
The output level is changed in 8 steps with 4-bit data.
2

CIRCUIT DESCRIPTION

IC3, IC5
FLASH
X30
AN0
IC2
–
+
MCU
78
IC52
84
DA0
LPF amp
X1 X1
– –
ATT
+ +
IC51 IC51
LPF LPF
IC53
R64
Fig. 2 ATT circuit
■ Attenuator Circuit Control Table
95pin 96pin
PA2 PA3
ATT1 ATT2
Vol0 Lo Lo
Vol1 Hi Lo
Vol2 Lo Hi
Vol3 Hi Hi
Vol4 Lo Lo
Vol5 Lo Hi
Vol6 Lo Lo
Vol7 Lo Lo

I/O Ports

The VGS-1 is a 3V system unit, but it can be adapted to
both 3V and 5V systems for external connection devices with
an 8-bit CMOS bus switch (IC57).
IC57 can convert levels from 3V to 3V, from 3V to 5V, or
from 5V to 3V.
■ If the External Device is a 3V System
It can be connected without a pull-up resistor.
■ If the External Device is a 5V System
If the external connection device is a 5V system, the VGS-
1 output ports (BUSY, SO, PLAY) must to be pulled up to 5 V.
The waveform may become irregular due to IC57 output ca-
pacity and pull-up resistance.
BUSY and PLAY are Hi/Lo logic output ports and are not
much affected by pull-up resistance.
Even when 3V or 5V is input to an input port, the IC57
output is 3V.
• UART Control
For UART control, the maximum communication speed is
115200 bps, and SO pull-up resistor recommends approx
10kΩ.
• Synchronous Control
SO is not used for synchronous control.
Only PLAY and BUSY must to be pulled up.
IC54
97pin 98pin
PA4 PA5
ATT3 ATT4
Lo Lo 100%
Lo Lo 69%
Lo Lo 55%
Lo Lo 44%
Hi Lo 36%
Hi Lo 28%
Lo Hi 15%
Hi Hi 12%