Memory - LG KE820 Service Manual

3.6. Memory

256Mbit Flash & 128Mbit SDRAM employed on KE820/KG99 with 16 bit parallel data bus thru
ADD(0)~ ADD(24). The 256Mbit Sibley Wireless Flash memory with LPSDRAM stacked device family
offers multiple high-performance solutions. The Sibley flash die is manufactured on 90 nm process
technology. It delivers 108 MHz synchronous burst and page-mode read rates with supports multi-
partitioning with Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. The
LPSDRAM is a high-performance volatile memory operating at speeds up to 104 MHz with
configurable burst lengths.
A(0:24)
1V8_MEM
C125
0.1u
C127
0.1u
C129
0.1u
Figure 11 Flash memory & SDRAM MCP circuit diagram
U101 PF38F5060M0Y0B0
A(0)
D1
A0 DQ0
A(1)
C1
A1 DQ1
A(2) B1
A2 DQ2
A(3)
B2
A3 DQ3
A(4) A2
A4 DQ4
A(5) B3
A5 DQ5
A(6) A3
A6 DQ6
A(7) A4
A7 DQ7
A(8) G8
A8 DQ8
A(9) F8
A9 DQ9
A(10)
E8
A10 DQ10
A(11) G9
A11 DQ11
A(12)
F9
A12 DQ12
A(13)
E9
A13 DQ13
A(14) D9
A14 DQ14
A(15)
C9
A15 DQ15
A(16) B9
A16
A(17) B4
A17 _F_ADV
A(18) B5
A18 _F1_CE
A(19) A5
A19 _F2_CE
A(20) F7
A20 _F3_CE
A(21) E7
A21 _F4_CE_A27
A(22)
B7
A22 F_CLK
A(23) A6
A23 D_CLK
A(24)
A7
A24 _D_CLK
A8
A25 _OE
B8
A26 _F_RST
F_WAIT
J1
F_VPP _WE
_D_WE
C126 D4
F_VCC1 _F_WP1
D6
F_VCC2 _F_WP2
0.1u J4
F_VCC3 F_DPD
J6
F_VCC4 N_CLE
N_ALE
C5
D_VCC1
D3
D_VCC2 N_RY__BY
D7
D_VCC3
C128
D_CKE
D2
S_VCC D_BA0
0.1u
D_BA1
J2
VCCQ1 _D_RAS
J3
VCCQ2 _D_CAS
J7
VCCQ3 _D1_CS
J8
VCCQ4 _D2_CS
D_DM0__S_LB
C130
C2
VSS1 D_DM1__S_UB
C3
VSS2 D_UDQS
0.1u C4
VSS3 D_LDQS
C6
VSS4 _S_CS1
C7
VSS5 S_CS2
C8
VSS6
K2
VSS7
K3
VSS8 DU1
K4
VSS9 DU2
K6
VSS10 DU3
K7
VSS11 DU4
K8
VSS12 RFU
- 41 -
3. TECHNICAL BRIEF
D(0:15)
D(0)
M2
D(1)
L1
K1 D(2)
D(3)
L2
M4 D(4)
L3 D(5)
L4 D(6)
L5 D(7)
M5 D(8)
L6 D(9)
D(10)
M6
L7 D(11)
D(12)
L8
D(13)
K9
L9 D(14)
D(15)
M8
D5 TP209
_ADV
G3
_FLASH1_CS
G2
H3
E6 R112 22
BFCLKI
K5
BFCLKO
J5
SDCLKO
H5
SDCLKI
H7 R113 22 TP105
_RD
G7 R114 10K
_RESET
J9
_WAIT
E2 TP107
_WR
H6
E1 R115 NA
_WP
F1 R117 0
B6 TP108
F_DPD
E5
D8
R118
H1 100K
G6 R445
TP109
CKE
R443
G4
H4 R444
F4 TP112 R446
_RAS
F3
TP113
_CAS
F2 128M SDRAM
_RAM_CS
E3 JP0
H9 JP1
_BC0
H8 JP2
_BC1
M7 JP3
M3
F6
H2
A1
A9
M1
M9
G1
1V8_MEM
NA JP0
0
JP1
A(12)
0 JP2
A(13)
NA JP3
A(14)
256M SDRAM
Open Short
Short Open
Short Open
Open Short