Pioneer MJ-D707 Service Manual page 57

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Pin Function
No. Name I/O
1 G1/A1
2 G0/A0 O/O
3 NC ––
4 PE0/INT0/EC0
I/I/I
5 PE1/INT1/EC1
6 PE2/INT2
7 PE3/INT3/NMI I/I/I
8 PE4/RMC
9 PE5
10 PE6/PWM O/O
11 PE7/TO/ADJ O/O/O 16 bit timer/counter rectangular waveform
12 PC0/KR0
| | IO/I
19 PC7/KR7
20 PB0/CINT IO/I
TE
L 13942296513
21 PB1/CS0
22 PB2/SCK0 IO/IO Serial clock (CH0) Input/Output terminal
23 PB3/SI0 IO/I
24 PB4/SO0 IO/O Serial data (CH0) output terminal
25 PB5/SCK1 IO/IO Serial clock (CH1) Input/Output terminal
26 PB6/SC1 IO/I
27 PB7/SO1 IO/O Serial data (CH1) output terminal
28 AVREF ––
29 PA0/AN0
| | I/O
36 PA7/AN7
37 AVss ––
38 RST
39 EXTAL
40 XTAL
41 Vss ––
42 TX
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43 TEX
44 VDD ––
.
45 VFDP ––
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Description
Output terminals used jointly for the FDP
timing signal (grid connection) and the
segment signal (anode connection).
NC (connected to VDD)
Timer/counter external event input terminal
I/I External interrupt request input terminal
Nonmaskable interrupt request input terminal
I/I Remote control reception circuit input terminal
14 bit PWM output terminal
output, 32 kHz oscillation division output
terminal
Key return input terminal for performing of
key scanning with the FDP segment signal
External capture input terminal to the 16 bit
timer/counter
I Serial interface (CH0) chip select input terminal
Serial data (CH0) input terminal
Serial data (CH1) input terminal
A/D converter reference voltage input terminal
A/D converter analog input terminal
A/D converter GND terminal
System reset terminal, L: Active
I System clock oscillation crystal connection
terminal
O
GND terminal
O Crystal connection terminal for 32 kHz timer
counter clock oscillation
I
x ao
y
Positive power supply terminal
i
FDP voltage supply terminal when the internal
resistor is specified by the mask option.
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8
No. Name
46 PD0/A55
| |
53 PD7/A48
54 PF0/A47
| |
61 PF7/A40
62 PG0/A39
| |
69 PG7/A32
70 PH0/A31
| |
77 PH7/A24
78 A23
| |
85 A16
86 G15/A15
| |
88 G13/A13
89 VDD
90 G12/A12
| |
Q Q
100 G2/A2
3 6 7 1 3
Note: The NC terminal of pin 3 must be connected to VDD. Connect
the VDD terminals of pin 44 and pin 89 both to VDD.
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.
MJ-D707, MJ-17D
2 9 9 4 2 8
I/O Description
FDP segment signal (anode connection)
O/O output terminal
O
Output terminals for FDP timing signal
O/O (grid connection) and segment signal
(anode connection)
–– Positive power supply terminal
Output terminals for FDP timing signal
O/O (grid connection) and segment signal
(anode connection)
1 5 0 5 8 2 9 9 4
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9 9
2 8 9 9
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