Motorola APX 1000 Detailed Service Manual page 891

Schematics, Boards Overlays, and Parts Lists: Transceiver (RF) Boards: VHF (84012618001)
DDR INTERFACE
U6302M6
DDR_CLKX_1
SDCLKX
DDR_CLK_1
SDCLK
DDR_CLKE
SDCLK_EN
DDR_WE
NSWE
DDR_BANK0
SBANK_0
DDR_BANK1
SBANK_1
DDR_RAS
SDATA_0 CONTROL NSRAS
DDR_CAS
SDATA_1 NSCAS
DDR_CS
SDATA_2 CS_SDRAM
DDR_UDM
SDATA_3 NSDQMU
DDR_LDM
SDATA_4 NSDQML
DDR_DQSH
SDATA_5 DSQ_H
DDR_DQSL
SDATA_6 DSQ_L
SDATA_7 SADD_0
SDATA_8 DATA SADD_1
SDATA_9 SADD_2
SDATA_10 SADD_3
SDATA_11 SADD_4
SDATA_12 SADD_5
SDATA_13 SADD_6
SDATA_14 ADDRESS SADD_7
SDATA_15 SADD_8
SADD_9
SADD_10
SADD_11
SADD_12
SADD_13
DDR_DATA<17..0>
MMC INTERFACE
F2_TIMER_OUT
U6302M6
MMC1_CLK
MMC1_CLKIN
MMC1_CMD
MMC1_CMDDIR
MMC1_DATDIR0
OPTION CARD INTF MMC1_DATDIR1
MMC1_DATDIR2
MMC1_DATDIR3
MMC1_DAT0
MMC1_DAT1
MMC1_DAT2
MMC1_DAT3
MMC2_CLK
MMC2_CMD
MMC2_CMDDIR
MMC2_DATDIR0
MEMORY CARD INTF
MMC2_DATDIR1
MMC2_DAT0
MMC2_DAT1
MMC2_DAT2
MMC2_DAT3
U6301M6
R6301M6
TP6307M6
TP6308M6
CLK
CLK*
EN_CLKE
DDR_WE
WE
DDR_CAS
CAS
DDR_RAS
RAS
DDR_CRTL<6..0> DDR_CS
EN_CS
DDR_BANK0
BA0
BA1
A0
A1
DDR_ADDR<2>
A2
DDR_ADDR<3>
A3
DDR_ADDR<4>
A4
DDR_ADDR<5>
A5
DDR_ADDR<6>
A6
DDR_ADDR<7>
A7
DDR_ADDR<8>
A8
DDR_ADDR<9>
A9
DDR_ADDR<10>
A10_AP
DDR_ADDR<11>
A11
DDR_ADDR<12>
A12
DDR_UDM
UDM
DDR_LDM
LDM
DDR_ADDR<13..0>
R6305M6
RSW_A
OUT
TP6301M6
AVR_STATUS_1.8V
OUT
R6307M6
RSW_B
OUT
R63050M6
RSW_INT
OUT
ALC_DAC_RST
OUT
TP6304M6
TP6303M6
DDR_DQSH
UDQS
DDR_DQSL
LDQS
DQ0
DDR_DATA<0>
DQ1
DDR_DATA<1>
DQ2 DDR_DATA<2>
DQ3 DDR_DATA<3>
DQ4
DDR_DATA<4>
DQ5 DDR_DATA<5>
DQ6 DDR_DATA<6>
DQ7
DDR_DATA<7>
DQ8
DDR_DATA<8>
DQ9 DDR_DATA<9>
DQ10 DDR_DATA<10>
DQ11
DDR_DATA<11>
DQ12 DDR_DATA<12>
DQ13 DDR_DATA<13>
DQ14
DDR_DATA<14>
DQ15
DDR_DATA<15>
NC1
NC
NC2
R6492M6 FLASH INTERFACE
TP6305M6
U6302M6
TP6306M6
NF_ADV
NFCS_0
NFCS_1
NFCS_2
NFCS_3
NFOE
CONTROL
NFRP
NFWE
NFWP
FDATA_0 FCLK
FDATA_1 FRDY
FDATA_2 FADD_1
FDATA_3 FADD_2
FDATA_4 FADD_3
FDATA_5 FADD_4
FDATA_6 FADD_5
FDATA_7 FADD_6
FDATA_8 DATA FADD_7
FDATA_9 FADD_8
FDATA_10 FADD_9
FDATA_11 FADD_10
FDATA_12 FADD_11
FDATA_13 FADD_12
FDATA_14 ADDRESS FADD_13
FDATA_15 FADD_14
FADD_15
FADD_16
FADD_17
FADD_18
FADD_19
FADD_20
FADD_21
FADD_22
FADD_23
FADD_24
FADD_25
CHANGES MADE
ADDED PA_SHTDN TO PORT M7 & R6492
PA_SHTDN
R6316M6
FLASH_CTRL<8..0>
R6304M6
FLASH_RDY
R6306M6
R6310M6
R6314M6
R6311M6
CLK
CE
FLASH_OE_A
OE
R6313M6 WE
TP6302M6
RST
WP
R6312M6 ADV
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25_512M
A26_1G
NC
FLASH_ADDR<25..1>
FLASH_DATA<15..0>
Figure 8-17. Memory Interface Circuit
8-45
V_FLASH
U6304M6
WAIT
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
RFU1 NC
RFU2 NC
RFU3
NC
RFU4 NC